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Commit 6f67fe7a authored by Hemant Kumar's avatar Hemant Kumar
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ARM: dts: msm: Add super speed phy reset clocks for sdxpoorwills 



Super speed phy needs to perform BCR reset using GCC_USB3_PHY_BCR
and GCC_USB3PHY_PHY_BCR.

Change-Id: I05be3c42d8d6195e639dc75679d4118adee10ec6
Signed-off-by: default avatarHemant Kumar <hemantk@codeaurora.org>
parent 01c25b13
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