ARM: dts: msm: Add CoreSight byte counter interrupt for 9625

The CoreSight block can produce an interrupt on transfer of
programmed number of bytes to ETR-memory. Add device tree
entry to support this feature. Also, disable the feature on
v1 as it does not support it.

Change-Id: Id7c6d94efe0a6f30c9773f607625acdb5f1d90a4
Signed-off-by: Pushkar Joshi <pushkarj@codeaurora.org>