ARM: dts: msm: Add CoreSight byte counter interrupt for 8974

The CoreSight block can produce an interrupt on transfer of
programmed number of bytes to ETR-memory. Add device tree
entry to support this feature. Also, disable the feature
on v1 as it does not support it.

Change-Id: Ic92326ae1038386be3089e10556ca0b5266c29fd
Signed-off-by: Pushkar Joshi <pushkarj@codeaurora.org>