Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Skip to content
Commit d2073aae authored by Sujit Reddy Thumma's avatar Sujit Reddy Thumma Committed by Stephen Boyd
Browse files

mmc: msm_sdcc: optimize sampling clock tuning procedure



SDCC-Card tuning sequence comprises of 16 phases. When the
card is detected for the first time the entire tuning
sequence should be implemented to determine the optimum phase
and lock the DLL. However, if the card is transitioning out
of low power mode or when the clock frequency is changed
dynamically, there is no need to carry out tuning sequence
for all 16 phases. It is sufficient to try with the last
successful tuning phase first. This reduces the overhead
involved in executing the entire tuning operation.

In case if the last successful tuning phase has failed,
tuning for all phases needs to be carried out to figure
out optimum phase.

Change-Id: I78ea074a9bdeb5686c96debfcde3490d50beaf09
Signed-off-by: default avatarSujit Reddy Thumma <sthumma@codeaurora.org>
parent febf687b
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment