usb: dwc: Avoid Core and PHY HW operation when low power mode entry fails
When the DWC3 core fails to enter into low power mode due to P3 state, it
cancels the low power mode entry routine, but it leaves the HS-PHY irq in
disabled state and the QSCRATCH CTRL register modified. This could lead to
HW issues since the core has not entered into low power mode.
Change-Id: I1822cb57dfaeb0c5e15dab6c777ffedc2d7bd57d
Signed-off-by:
Danny Segal <dsegal@codeaurora.org>
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