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Commit df95e42e authored by Niklas Söderlund's avatar Niklas Söderlund Committed by Mauro Carvalho Chehab
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edac: i5100 ack error detection register after each read

If I only ack the detection register after a error have been detected
I'm unable to reliably detect errors. I have verified this behavior
using both an error injection DIMM and software to inject errors.

I can't find any documentation supporting this behavior in Intel 5100
Memory Controller Hub Chipset, see 1. So this is all based on
experimentation.

[1] Intel® 5100 Memory Controller Hub Chipset
    http://www.intel.com/content/dam/doc/datasheet/5100-


	memory-controller-hub-chipset-datasheet.pdf

Signed-off-by: default avatarNiklas Söderlund <niklas.soderlund@ericsson.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent b6378cb3
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