edac: i5100 fix erroneous define for M1Err
According to [1] the define for M1Err in the FERR_NF_MEM register is wrong. It should be at position 1 not 0. [1] Intel 5100 Memory Controller Hub Chipset Doc.Nr: 318378 http://www.intel.com/content/dam/doc/datasheet/5100- memory-controller-hub-chipset-datasheet.pdf Reported-by:Ba Thang Nguyen <thang.b.nguyen@dektech.com.au> Signed-off-by:
Niklas Söderlund <niklas.soderlund@ericsson.com> Signed-off-by:
Mauro Carvalho Chehab <mchehab@redhat.com>
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