ARM: dts: msm: Change QMP interrupt register for SM8150

Current IPC interrupts to NPU are not configured correctly. Switch to
a spare control register and update the mask values needed to trigger
and interrupt to NPU.

Change-Id: Ia1ca29e874f8dfb85ec7d73ace7be0566b55f5cf
Signed-off-by: Chris Lew <clew@codeaurora.org>