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Commit 8cd39093 authored by Gaurav Jindal's avatar Gaurav Jindal
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ARM: dts: msm: Add svsl1 level for CSID clock in atoll 



Add the svs l1 clock level for CSID in atoll.

Change-Id: I9cffb4277599015d94b22682528687eda18be63e
Signed-off-by: default avatarGaurav Jindal <gjindal@codeaurora.org>
parent 5ec74675
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