drm/msm/gem: add cache flush api in msm_gem

msm_gem object allocates the memory using kzalloc or vmalloc based on
memory size requirement. This is cacheable memory and must be flushed
before any cpu access on it. DSI and LUTDMA path does cpu access on this
memory while INLINE ROT and WB allows device access.
This change adds a sync api to ensure that cache is clean before device
does any DMA operation on the buffer.

Change-Id: I9c3e0fd4a05b66a041092c09f9719dc691664770
Signed-off-by: Harsh Sahu <hsahu@codeaurora.org>