regulator: kryo-regulator: fix APCC_PGS_RET_STATUS polling logic
It is only necessary to poll the power gate retention status register
when disallowing LDO retention mode. Once the power control override
register is cleared, any power domain is allowed to utilize LDO
retention. Therefore, polling of APCC_PGS_RET_STATUS must only be done
when VDD_APCC is scaled below retention voltage plus LDO headroom
voltage and the voltage is not sufficient to safely support power
domains using LDO retention.
Change-Id: I6578a75167ee4174be6ff8f1895d2d86d2ae8d76
CRs-Fixed: 980775
Signed-off-by:
Osvaldo Banuelos <osvaldob@codeaurora.org>
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