Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit fab96755 authored by Osvaldo Banuelos's avatar Osvaldo Banuelos
Browse files

regulator: kryo-regulator: fix APCC_PGS_RET_STATUS polling logic 



It is only necessary to poll the power gate retention status register
when disallowing LDO retention mode. Once the power control override
register is cleared, any power domain is allowed to utilize LDO
retention. Therefore, polling of APCC_PGS_RET_STATUS must only be done
when VDD_APCC is scaled below retention voltage plus LDO headroom
voltage and the voltage is not sufficient to safely support power
domains using LDO retention.

Change-Id: I6578a75167ee4174be6ff8f1895d2d86d2ae8d76
CRs-Fixed: 980775
Signed-off-by: default avatarOsvaldo Banuelos <osvaldob@codeaurora.org>
parent a8371783

drivers/regulator/kryo-regulator.c

+3 −3
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2015, The Linux Foundation. All rights reserved.

 * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -454,10 +454,10 @@ static int kryo_regulator_retention_set_bypass(struct regulator_dev *rdev, 
	/* Ensure write above completes before proceeding */

	mb();



	if (kvreg->version < MSM8996_CPUSS_VER_1P1) {

	if (enable == BHS_MODE && kvreg->version < MSM8996_CPUSS_VER_1P1) {

		/* No status register, delay worst case */

		udelay(PWR_GATE_SWITCH_TIMEOUT_US);

	} else {

	} else if (enable == BHS_MODE) {

		while (timeout > 0) {

			reg_val = readl_relaxed(kvreg->pm_apcc_base

						+ APCC_PGS_RET_STATUS);