ARM: dts: msm: correct CE clock setting for crypto driver on msm8996

Correct CE clock setting for crypto drivers, core_clk_src should
link to voting clock; otherwise, ce1 clock is set to be only half
of 171M HZ during crypto operations.

Change-Id: I0d9e048381a83d4788bf4f700d788137b59bd368
Signed-off-by: Zhen Kong <zkong@codeaurora.org>