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Commit 5c1c63f6 authored by Xing Zheng's avatar Xing Zheng Committed by Heiko Stuebner
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clk: rockchip: add 533.25MHz to rk3399 clock rates table 



We need to get the accurate 533.25MHz for the DP display.

Signed-off-by: default avatarXing Zheng <zhengxing@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 1001354c
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