Promotion of kernel.lnx.4.4-160817. (d0c25e98) · Commits · e / devices / android_kernel_sony_msm8998

Documentation/devicetree/bindings/fb/mdss-mdp.txt

+6 −0

Original line number	Diff line number	Diff line
		@@ -243,6 +243,12 @@ Bus Scaling Data:
		Optional properties:
		- batfet-supply : Phandle for battery FET regulator device node.
		- vdd-cx-supply : Phandle for vdd CX regulator device node.
		- vdd-cx-min-uV : The minimum voltage level in uV for the CX rail
		whenever the display is on. If vdd-cx-supply is
		specified, then this binding is mandatory.
		- vdd-cx-max-uV : The maximum voltage level in uV for the CX rail
		whenever the display is on. If vdd-cx-supply is
		specified, then this binding is mandatory.
		- qcom,vbif-settings : Array with key-value pairs of constant VBIF register
		settings used to setup MDSS QoS for optimum performance.
		The key used should be offset from "vbif_phys" register

arch/arm/boot/dts/qcom/msm8996.dtsi

+1 −0

Original line number	Diff line number	Diff line
		@@ -808,6 +808,7 @@
		<&mdss_dsi1_pll clk_dsi1pll_byte_clk_mux>,
		<&mdss_hdmi_pll clk_hdmi_vco_clk>;
		#clock-cells = <1>;
		#reset-cells = <1>;
		};

		clock_gpu: qcom,gpucc@8c0000 {

arch/arm/boot/dts/qcom/msmcobalt-bus.dtsi

+13 −8

Original line number	Diff line number	Diff line
		@@ -131,10 +131,6 @@
		clock-names = "bus_clk", "bus_a_clk";
		clocks = <&clock_gcc clk_mmssnoc_axi_clk>,
		<&clock_gcc clk_mmssnoc_axi_a_clk>;
		clk-mdss-axi-no-rate-supply =
		<&gdsc_mdss>;
		clk-mdss-ahb-no-rate-supply =
		<&gdsc_mdss>;
		clk-camss-ahb-no-rate-supply =
		<&gdsc_camss_top>;
		clk-video-ahb-no-rate-supply =
		@@ -145,8 +141,6 @@
		clock-names =
		"clk-noc-cfg-ahb-no-rate",
		"clk-mnoc-ahb-no-rate",
		"clk-mdss-ahb-no-rate",
		"clk-mdss-axi-no-rate",
		"clk-camss-ahb-no-rate",
		"clk-video-ahb-no-rate",
		"clk-video-axi-no-rate";
		@@ -154,8 +148,6 @@
		<&clock_gcc clk_mmssnoc_axi_clk>,
		<&clock_gcc clk_gcc_mmss_noc_cfg_ahb_clk>,
		<&clock_mmss clk_mmss_mnoc_ahb_clk>,
		<&clock_mmss clk_mmss_mdss_ahb_clk>,
		<&clock_mmss clk_mmss_mdss_axi_clk>,
		<&clock_mmss clk_mmss_camss_ahb_clk>,
		<&clock_mmss clk_mmss_video_ahb_clk>,
		<&clock_mmss clk_mmss_video_axi_clk>;
		@@ -535,6 +527,19 @@
		qcom,bus-dev = <&fab_mnoc>;
		qcom,vrail-comp = <25>;
		qcom,mas-rpm-id = <ICBID_MASTER_MDP0>;
		clk-mdss-axi-no-rate-supply =
		<&gdsc_mdss>;
		clk-mdss-ahb-no-rate-supply =
		<&gdsc_mdss>;
		qcom,node-qos-clks {
		clock-names =
		"clk-mdss-ahb-no-rate",
		"clk-mdss-axi-no-rate";
		clocks =
		<&clock_mmss clk_mmss_mdss_ahb_clk>,
		<&clock_mmss clk_mmss_mdss_axi_clk>;
		};

		};

		mas_mdp_p1: mas-mdp-p1 {

arch/arm/boot/dts/qcom/msmcobalt-pinctrl.dtsi

+937 −0

Original line number	Diff line number	Diff line
		@@ -1778,5 +1778,942 @@
		bias-pull-up;
		};
		};

		pri_aux_pcm_clk {
		pri_aux_pcm_clk_sleep: pri_aux_pcm_clk_sleep {
		mux {
		pins = "gpio65";
		function = "gpio";
		};

		config {
		pins = "gpio65";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_aux_pcm_clk_active: pri_aux_pcm_clk_active {
		mux {
		pins = "gpio65";
		function = "pri_mi2s";
		};

		config {
		pins = "gpio65";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		pri_aux_pcm_sync {
		pri_aux_pcm_sync_sleep: pri_aux_pcm_sync_sleep {
		mux {
		pins = "gpio66";
		function = "gpio";
		};

		config {
		pins = "gpio66";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_aux_pcm_sync_active: pri_aux_pcm_sync_active {
		mux {
		pins = "gpio66";
		function = "pri_mi2s_ws";
		};

		config {
		pins = "gpio66";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		pri_aux_pcm_din {
		pri_aux_pcm_din_sleep: pri_aux_pcm_din_sleep {
		mux {
		pins = "gpio67";
		function = "gpio";
		};

		config {
		pins = "gpio67";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_aux_pcm_din_active: pri_aux_pcm_din_active {
		mux {
		pins = "gpio67";
		function = "pri_mi2s";
		};

		config {
		pins = "gpio67";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		pri_aux_pcm_dout {
		pri_aux_pcm_dout_sleep: pri_aux_pcm_dout_sleep {
		mux {
		pins = "gpio68";
		function = "gpio";
		};

		config {
		pins = "gpio68";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_aux_pcm_dout_active: pri_aux_pcm_dout_active {
		mux {
		pins = "gpio68";
		function = "pri_mi2s";
		};

		config {
		pins = "gpio68";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		sec_aux_pcm {
		sec_aux_pcm_sleep: sec_aux_pcm_sleep {
		mux {
		pins = "gpio80", "gpio81";
		function = "gpio";
		};

		config {
		pins = "gpio80", "gpio81";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		sec_aux_pcm_active: sec_aux_pcm_active {
		mux {
		pins = "gpio80", "gpio81";
		function = "sec_mi2s";
		};

		config {
		pins = "gpio80", "gpio81";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		sec_aux_pcm_din {
		sec_aux_pcm_din_sleep: sec_aux_pcm_din_sleep {
		mux {
		pins = "gpio82";
		function = "gpio";
		};

		config {
		pins = "gpio82";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		sec_aux_pcm_din_active: sec_aux_pcm_din_active {
		mux {
		pins = "gpio82";
		function = "sec_mi2s";
		};

		config {
		pins = "gpio82";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		sec_aux_pcm_dout {
		sec_aux_pcm_dout_sleep: sec_aux_pcm_dout_sleep {
		mux {
		pins = "gpio83";
		function = "gpio";
		};

		config {
		pins = "gpio83";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		sec_aux_pcm_dout_active: sec_aux_pcm_dout_active {
		mux {
		pins = "gpio83";
		function = "sec_mi2s";
		};

		config {
		pins = "gpio83";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		tert_aux_pcm {
		tert_aux_pcm_sleep: tert_aux_pcm_sleep {
		mux {
		pins = "gpio75", "gpio76";
		function = "gpio";
		};

		config {
		pins = "gpio75", "gpio76";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		tert_aux_pcm_active: tert_aux_pcm_active {
		mux {
		pins = "gpio75", "gpio76";
		function = "ter_mi2s";
		};

		config {
		pins = "gpio75", "gpio76";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		tert_aux_pcm_din {
		tert_aux_pcm_din_sleep: tert_aux_pcm_din_sleep {
		mux {
		pins = "gpio77";
		function = "gpio";
		};

		config {
		pins = "gpio77";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		tert_aux_pcm_din_active: tert_aux_pcm_din_active {
		mux {
		pins = "gpio77";
		function = "ter_mi2s";
		};

		config {
		pins = "gpio77";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		tert_aux_pcm_dout {
		tert_aux_pcm_dout_sleep: tert_aux_pcm_dout_sleep {
		mux {
		pins = "gpio78";
		function = "gpio";
		};

		config {
		pins = "gpio78";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		tert_aux_pcm_dout_active: tert_aux_pcm_dout_active {
		mux {
		pins = "gpio78";
		function = "ter_mi2s";
		};

		config {
		pins = "gpio78";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		quat_aux_pcm {
		quat_aux_pcm_sleep: quat_aux_pcm_sleep {
		mux {
		pins = "gpio58", "gpio59";
		function = "gpio";
		};

		config {
		pins = "gpio58", "gpio59";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		quat_aux_pcm_active: quat_aux_pcm_active {
		mux {
		pins = "gpio58", "gpio59";
		function = "qua_mi2s";
		};

		config {
		pins = "gpio58", "gpio59";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		quat_aux_pcm_din {
		quat_aux_pcm_din_sleep: quat_aux_pcm_din_sleep {
		mux {
		pins = "gpio60";
		function = "gpio";
		};

		config {
		pins = "gpio60";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		quat_aux_pcm_din_active: quat_aux_pcm_din_active {
		mux {
		pins = "gpio60";
		function = "qua_mi2s";
		};

		config {
		pins = "gpio60";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		quat_aux_pcm_dout {
		quat_aux_pcm_dout_sleep: quat_aux_pcm_dout_sleep {
		mux {
		pins = "gpio61";
		function = "gpio";
		};

		config {
		pins = "gpio61";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		quat_aux_pcm_dout_active: quat_aux_pcm_dout_active {
		mux {
		pins = "gpio61";
		function = "qua_mi2s";
		};

		config {
		pins = "gpio61";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		pri_mi2s_mclk {
		pri_mi2s_mclk_sleep: pri_mi2s_mclk_sleep {
		mux {
		pins = "gpio64";
		function = "gpio";
		};

		config {
		pins = "gpio64";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_mi2s_mclk_active: pri_mi2s_mclk_active {
		mux {
		pins = "gpio64";
		function = "pri_mi2s";
		};

		config {
		pins = "gpio64";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		pri_mi2s_sck {
		pri_mi2s_sck_sleep: pri_mi2s_sck_sleep {
		mux {
		pins = "gpio65";
		function = "gpio";
		};

		config {
		pins = "gpio65";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_mi2s_sck_active: pri_mi2s_sck_active {
		mux {
		pins = "gpio65";
		function = "pri_mi2s";
		};

		config {
		pins = "gpio65";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		pri_mi2s_ws {
		pri_mi2s_ws_sleep: pri_mi2s_ws_sleep {
		mux {
		pins = "gpio66";
		function = "gpio";
		};

		config {
		pins = "gpio66";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_mi2s_ws_active: pri_mi2s_ws_active {
		mux {
		pins = "gpio66";
		function = "pri_mi2s_ws";
		};

		config {
		pins = "gpio66";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		pri_mi2s_sd0 {
		pri_mi2s_sd0_sleep: pri_mi2s_sd0_sleep {
		mux {
		pins = "gpio67";
		function = "gpio";
		};

		config {
		pins = "gpio67";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_mi2s_sd0_active: pri_mi2s_sd0_active {
		mux {
		pins = "gpio67";
		function = "pri_mi2s";
		};

		config {
		pins = "gpio67";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		pri_mi2s_sd1 {
		pri_mi2s_sd1_sleep: pri_mi2s_sd1_sleep {
		mux {
		pins = "gpio68";
		function = "gpio";
		};

		config {
		pins = "gpio68";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		pri_mi2s_sd1_active: pri_mi2s_sd1_active {
		mux {
		pins = "gpio68";
		function = "pri_mi2s";
		};

		config {
		pins = "gpio68";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		sec_mi2s_mclk {
		sec_mi2s_mclk_sleep: sec_mi2s_mclk_sleep {
		mux {
		pins = "gpio79";
		function = "gpio";
		};

		config {
		pins = "gpio79";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		sec_mi2s_mclk_active: sec_mi2s_mclk_active {
		mux {
		pins = "gpio79";
		function = "sec_mi2s";
		};

		config {
		pins = "gpio79";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		sec_mi2s {
		sec_mi2s_sleep: sec_mi2s_sleep {
		mux {
		pins = "gpio80", "gpio81";
		function = "gpio";
		};

		config {
		pins = "gpio80", "gpio81";
		drive-strength = <2>; /* 2 mA */
		bias-disable; /* NO PULL */
		input-enable;
		};
		};

		sec_mi2s_active: sec_mi2s_active {
		mux {
		pins = "gpio80", "gpio81";
		function = "sec_mi2s";
		};

		config {
		pins = "gpio80", "gpio81";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		sec_mi2s_sd0 {
		sec_mi2s_sd0_sleep: sec_mi2s_sd0_sleep {
		mux {
		pins = "gpio82";
		function = "gpio";
		};

		config {
		pins = "gpio82";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		sec_mi2s_sd0_active: sec_mi2s_sd0_active {
		mux {
		pins = "gpio82";
		function = "sec_mi2s";
		};

		config {
		pins = "gpio82";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		sec_mi2s_sd1 {
		sec_mi2s_sd1_sleep: sec_mi2s_sd1_sleep {
		mux {
		pins = "gpio83";
		function = "gpio";
		};

		config {
		pins = "gpio83";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		sec_mi2s_sd1_active: sec_mi2s_sd1_active {
		mux {
		pins = "gpio83";
		function = "sec_mi2s";
		};

		config {
		pins = "gpio83";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		tert_mi2s_mclk {
		tert_mi2s_mclk_sleep: tert_mi2s_mclk_sleep {
		mux {
		pins = "gpio74";
		function = "gpio";
		};

		config {
		pins = "gpio74";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		tert_mi2s_mclk_active: tert_mi2s_mclk_active {
		mux {
		pins = "gpio74";
		function = "ter_mi2s";
		};

		config {
		pins = "gpio74";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		tert_mi2s {
		tert_mi2s_sleep: tert_mi2s_sleep {
		mux {
		pins = "gpio75", "gpio76";
		function = "gpio";
		};

		config {
		pins = "gpio75", "gpio76";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		tert_mi2s_active: tert_mi2s_active {
		mux {
		pins = "gpio75", "gpio76";
		function = "ter_mi2s";
		};

		config {
		pins = "gpio75", "gpio76";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		tert_mi2s_sd0 {
		tert_mi2s_sd0_sleep: tert_mi2s_sd0_sleep {
		mux {
		pins = "gpio77";
		function = "gpio";
		};

		config {
		pins = "gpio77";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		tert_mi2s_sd0_active: tert_mi2s_sd0_active {
		mux {
		pins = "gpio77";
		function = "ter_mi2s";
		};

		config {
		pins = "gpio77";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		tert_mi2s_sd1 {
		tert_mi2s_sd1_sleep: tert_mi2s_sd1_sleep {
		mux {
		pins = "gpio78";
		function = "gpio";
		};

		config {
		pins = "gpio78";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		tert_mi2s_sd1_active: tert_mi2s_sd1_active {
		mux {
		pins = "gpio78";
		function = "ter_mi2s";
		};

		config {
		pins = "gpio78";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		quat_mi2s_mclk {
		quat_mi2s_mclk_sleep: quat_mi2s_mclk_sleep {
		mux {
		pins = "gpio57";
		function = "gpio";
		};

		config {
		pins = "gpio57";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		quat_mi2s_mclk_active: quat_mi2s_mclk_active {
		mux {
		pins = "gpio57";
		function = "qua_mi2s";
		};

		config {
		pins = "gpio57";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		quat_mi2s {
		quat_mi2s_sleep: quat_mi2s_sleep {
		mux {
		pins = "gpio58", "gpio59";
		function = "gpio";
		};

		config {
		pins = "gpio58", "gpio59";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		quat_mi2s_active: quat_mi2s_active {
		mux {
		pins = "gpio58", "gpio59";
		function = "qua_mi2s";
		};

		config {
		pins = "gpio58", "gpio59";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		quat_mi2s_sd0 {
		quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep {
		mux {
		pins = "gpio60";
		function = "gpio";
		};

		config {
		pins = "gpio60";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		quat_mi2s_sd0_active: quat_mi2s_sd0_active {
		mux {
		pins = "gpio60";
		function = "qua_mi2s";
		};

		config {
		pins = "gpio60";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		quat_mi2s_sd1 {
		quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep {
		mux {
		pins = "gpio61";
		function = "gpio";
		};

		config {
		pins = "gpio61";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		quat_mi2s_sd1_active: quat_mi2s_sd1_active {
		mux {
		pins = "gpio61";
		function = "qua_mi2s";
		};

		config {
		pins = "gpio61";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		quat_mi2s_sd2 {
		quat_mi2s_sd2_sleep: quat_mi2s_sd2_sleep {
		mux {
		pins = "gpio62";
		function = "gpio";
		};

		config {
		pins = "gpio62";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		quat_mi2s_sd2_active: quat_mi2s_sd2_active {
		mux {
		pins = "gpio62";
		function = "qua_mi2s";
		};

		config {
		pins = "gpio62";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		quat_mi2s_sd3 {
		quat_mi2s_sd3_sleep: quat_mi2s_sd3_sleep {
		mux {
		pins = "gpio63";
		function = "gpio";
		};

		config {
		pins = "gpio63";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		quat_mi2s_sd3_active: quat_mi2s_sd3_active {
		mux {
		pins = "gpio63";
		function = "qua_mi2s";
		};

		config {
		pins = "gpio63";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		};
		};
		};
		};
		};

arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi

+17 −6

Original line number	Diff line number	Diff line
		@@ -165,21 +165,21 @@
		compatible = "qcom,gfxcc-cobalt-v2";
		qcom,gfxfreq-speedbin0 =
		< 0 0 0 >,
		< 189000000 1 RPM_SMD_REGULATOR_LEVEL_SVS >,
		< 264000000 2 RPM_SMD_REGULATOR_LEVEL_SVS >,
		< 180000000 1 RPM_SMD_REGULATOR_LEVEL_SVS >,
		< 257000000 2 RPM_SMD_REGULATOR_LEVEL_SVS >,
		< 342000000 3 RPM_SMD_REGULATOR_LEVEL_SVS >,
		< 414000000 4 RPM_SMD_REGULATOR_LEVEL_SVS >,
		< 520000000 5 RPM_SMD_REGULATOR_LEVEL_NOM >,
		< 515000000 5 RPM_SMD_REGULATOR_LEVEL_NOM >,
		< 596000000 6 RPM_SMD_REGULATOR_LEVEL_NOM >,
		< 670000000 7 RPM_SMD_REGULATOR_LEVEL_TURBO >,
		< 710000000 8 RPM_SMD_REGULATOR_LEVEL_TURBO >;
		qcom,gfxfreq-mx-speedbin0 =
		< 0 0 >,
		< 189000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
		< 264000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
		< 180000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
		< 257000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
		< 342000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
		< 414000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
		< 520000000 RPM_SMD_REGULATOR_LEVEL_NOM >,
		< 515000000 RPM_SMD_REGULATOR_LEVEL_NOM >,
		< 596000000 RPM_SMD_REGULATOR_LEVEL_NOM >,
		< 670000000 RPM_SMD_REGULATOR_LEVEL_TURBO >,
		< 710000000 RPM_SMD_REGULATOR_LEVEL_TURBO >;
		@@ -357,3 +357,14 @@
		qcom,allow-quotient-interpolation;
		qcom,cpr-scaled-open-loop-voltage-as-ceiling;
		};

		&qusb_phy0 {
		qcom,qusb-phy-init-seq =
		/* <value reg_offset> */
		<0x13 0x04
		0x7c 0x18c
		0x80 0x2c
		0x0a 0x184
		0x00 0x240
		0x19 0xb4>;
		};