clk: qcom: Remove the CLK_SET_RATE_PARENT flag for Byte intferface clk

If the CLK_SET_RATE_PARENT flag for the mmss_mdss_byte_intf_div_clk
divider is set re-calculation of dividers in DSI byte clock path takes
place which causes both the byte clock and byte interface clock to be
set to the same value.

Change-Id: Ia30c8070ec5c451a12f29e983089a7a2bbe6a8b3
Signed-off-by: Rashi Bindra <rbindra@codeaurora.org>