clk: qcom: clock-gcc-8992: Modify gpll4 and sdcc1 clock frequency

The gpll4 clock is now configured by SBL to run at 1376 MHz. Modify the
frequency for the gpll4 clock and the dependent frequencies for the sdcc1
clock.

Change-Id: I17f2658218ede51e8f10af50a5c413d6be5308c8
Signed-off-by: Pushkar Joshi <pushkarj@codeaurora.org>