Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Skip to content
Commit b724f66a authored by Benet Clark's avatar Benet Clark
Browse files

msm: mdss: Add special case for DSPP3 histogram intr shift bit



In order to enable/disable histogram interrupts, the interrupt
bit mask is programmed to the same histogram interrupt register for
all DSPPs. However, DSPP3's bit mask does not follow the typical
offset. We must add a special case for that interrupt bit shift.

Change-Id: Ia76a7eb0e56e30b657968ea776579c53ff43e390
Signed-off-by: default avatarBenet Clark <benetc@codeaurora.org>
parent 80bd3897
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment