ARM: dts: msm: add mem_timer and msm_iommu interrupts to bypass list

arch_mem_timer is used on the 8x26 chipset to get around the limitation of
CP15-based timers that are shut down when cores enter standalone power
collapse. However, the corresponding interrupt is not on the MPM bypass
list, as a result of which it is preventing TCXO shutdown in static display
mode (with a smartpanel configuration) even when the CPUs enter
RPM-assisted idle power collapse. This change adds the interrupt to the
bypass list - this is safe to do since when we do idle power collapse, we
rely on the RPM to interrupt the cores.

The msm_iommu_interrupts (msm_iommu_global_cfg_irq and
msm_iommu_global_client_irq) are needed for debugging SMMU configuration
errors and so can be bypassed as well.

Change-Id: I6e802c99a9530490555db56a65b622ff33037fb4
Signed-off-by: Anurag Singh <anursing@codeaurora.org>