Merge "msm: gsi: update IRAM size to 32KB for GSI 2.5" (f780bfbe) · Commits · e / devices / android_kernel_oneplus_sm8150

drivers/platform/msm/gsi/gsi.c

+55 −8

Original line number	Diff line number	Diff line
		@@ -2849,7 +2849,7 @@ int gsi_set_channel_cfg(unsigned long chan_hdl, struct gsi_chan_props *props,
		}
		EXPORT_SYMBOL(gsi_set_channel_cfg);

		static void gsi_configure_ieps(void *base)
		static void gsi_configure_ieps(void *base, enum gsi_ver ver)
		{
		void __iomem *gsi_base = base;

		@@ -2866,6 +2866,10 @@ static void gsi_configure_ieps(void *base)
		gsi_writel(11, gsi_base + GSI_GSI_IRAM_PTR_NEW_RE_OFFS);
		gsi_writel(12, gsi_base + GSI_GSI_IRAM_PTR_READ_ENG_COMP_OFFS);
		gsi_writel(13, gsi_base + GSI_GSI_IRAM_PTR_TIMER_EXPIRED_OFFS);

		if (ver >= GSI_VER_2_5)
		gsi_writel(17,
		gsi_base + GSI_V2_5_GSI_IRAM_PTR_TLV_CH_NOT_FULL_OFFS);
		}

		static void gsi_configure_bck_prs_matrix(void *base)
		@@ -2908,10 +2912,20 @@ static void gsi_configure_bck_prs_matrix(void *base)
		}

		int gsi_configure_regs(phys_addr_t gsi_base_addr, u32 gsi_size,
		phys_addr_t per_base_addr)
		phys_addr_t per_base_addr, enum gsi_ver ver)
		{
		void __iomem *gsi_base;

		if (!gsi_ctx) {
		pr_err("%s:%d gsi context not allocated\n", __func__, __LINE__);
		return -GSI_STATUS_NODEV;
		}

		if (ver <= GSI_VER_ERR \|\| ver >= GSI_VER_MAX) {
		GSIERR("Incorrect version %d\n", ver);
		return -GSI_STATUS_ERROR;
		}

		gsi_base = ioremap_nocache(gsi_base_addr, gsi_size);
		if (!gsi_base) {
		GSIERR("ioremap failed\n");
		@@ -2921,7 +2935,7 @@ int gsi_configure_regs(phys_addr_t gsi_base_addr, u32 gsi_size,
		gsi_writel(per_base_addr,
		gsi_base + GSI_GSI_PERIPH_BASE_ADDR_LSB_OFFS);
		gsi_configure_bck_prs_matrix((void *)gsi_base);
		gsi_configure_ieps(gsi_base);
		gsi_configure_ieps(gsi_base, ver);
		iounmap(gsi_base);

		return 0;
		@@ -2983,13 +2997,46 @@ int gsi_enable_fw(phys_addr_t gsi_base_addr, u32 gsi_size, enum gsi_ver ver)
		EXPORT_SYMBOL(gsi_enable_fw);

		void gsi_get_inst_ram_offset_and_size(unsigned long *base_offset,
		unsigned long *size)
		unsigned long *size, enum gsi_ver ver)
		{
		if (base_offset)
		*base_offset = GSI_GSI_INST_RAM_n_OFFS(0);
		unsigned long maxn;

		if (!gsi_ctx) {
		pr_err("%s:%d gsi context not allocated\n", __func__, __LINE__);
		return;
		}

		switch (ver) {
		case GSI_VER_1_0:
		case GSI_VER_1_2:
		case GSI_VER_1_3:
		maxn = GSI_GSI_INST_RAM_n_MAXn;
		break;
		case GSI_VER_2_0:
		maxn = GSI_V2_0_GSI_INST_RAM_n_MAXn;
		break;
		case GSI_VER_2_2:
		maxn = GSI_V2_2_GSI_INST_RAM_n_MAXn;
		break;
		case GSI_VER_2_5:
		maxn = GSI_V2_5_GSI_INST_RAM_n_MAXn;
		break;
		case GSI_VER_ERR:
		case GSI_VER_MAX:
		default:
		GSIERR("GSI version is not supported %d\n", ver);
		WARN_ON(1);
		return;
		}
		if (size)
		size = GSI_GSI_INST_RAM_n_WORD_SZ
		(GSI_GSI_INST_RAM_n_MAXn + 1);
		size = GSI_GSI_INST_RAM_n_WORD_SZ (maxn + 1);

		if (base_offset) {
		if (ver < GSI_VER_2_5)
		*base_offset = GSI_GSI_INST_RAM_n_OFFS(0);
		else
		*base_offset = GSI_V2_5_GSI_INST_RAM_n_OFFS(0);
		}
		}
		EXPORT_SYMBOL(gsi_get_inst_ram_offset_and_size);

drivers/platform/msm/gsi/gsi_reg.h

+11 −0

Original line number	Diff line number	Diff line
		@@ -604,6 +604,12 @@
		#define GSI_GSI_IRAM_PTR_EE_GENERIC_CMD_IRAM_PTR_BMSK 0xfff
		#define GSI_GSI_IRAM_PTR_EE_GENERIC_CMD_IRAM_PTR_SHFT 0x0

		#define GSI_V2_5_GSI_IRAM_PTR_TLV_CH_NOT_FULL_OFFS \
		(GSI_GSI_REG_BASE_OFFS + 0x00000408)
		#define GSI_V2_5_GSI_IRAM_PTR_TLV_CH_NOT_FULL_RMSK 0xfff
		#define GSI_V2_5_GSI_IRAM_PTR_TLV_CH_NOT_FULL_IRAM_PTR_BMSK 0xfff
		#define GSI_V2_5_GSI_IRAM_PTR_TLV_CH_NOT_FULL_IRAM_PTR_SHFT 0x0

		#define GSI_GSI_IRAM_PTR_CH_DB_OFFS \
		(GSI_GSI_REG_BASE_OFFS + 0x00000418)
		#define GSI_GSI_IRAM_PTR_CH_DB_RMSK 0xfff
		@@ -691,8 +697,13 @@
		#define GSI_GSI_INST_RAM_n_WORD_SZ 0x4
		#define GSI_GSI_INST_RAM_n_OFFS(n) \
		(GSI_GSI_REG_BASE_OFFS + 0x00004000 + GSI_GSI_INST_RAM_n_WORD_SZ * (n))
		#define GSI_V2_5_GSI_INST_RAM_n_OFFS(n) \
		(GSI_GSI_REG_BASE_OFFS + 0x0001b000 + GSI_GSI_INST_RAM_n_WORD_SZ * (n))
		#define GSI_GSI_INST_RAM_n_RMSK 0xffffffff
		#define GSI_GSI_INST_RAM_n_MAXn 4095
		#define GSI_V2_0_GSI_INST_RAM_n_MAXn 6143
		#define GSI_V2_2_GSI_INST_RAM_n_MAXn 4095
		#define GSI_V2_5_GSI_INST_RAM_n_MAXn 8191
		#define GSI_GSI_INST_RAM_n_INST_BYTE_3_BMSK 0xff000000
		#define GSI_GSI_INST_RAM_n_INST_BYTE_3_SHFT 0x18
		#define GSI_GSI_INST_RAM_n_INST_BYTE_2_BMSK 0xff0000

drivers/platform/msm/ipa/ipa_v3/ipa.c

+18 −16

Original line number	Diff line number	Diff line
		@@ -4458,21 +4458,6 @@ static void ipa3_trigger_ipa_ready_cbs(void)
		mutex_unlock(&ipa3_ctx->lock);
		}

		static int ipa3_gsi_pre_fw_load_init(void)
		{
		int result;

		result = gsi_configure_regs(ipa3_res.transport_mem_base,
		ipa3_res.transport_mem_size,
		ipa3_res.ipa_mem_base);
		if (result) {
		IPAERR("Failed to configure GSI registers\n");
		return -EINVAL;
		}

		return 0;
		}

		static void ipa3_uc_is_loaded(void)
		{
		IPADBG("\n");
		@@ -4515,6 +4500,22 @@ static enum gsi_ver ipa3_get_gsi_ver(enum ipa_hw_type ipa_hw_type)
		return gsi_ver;
		}

		static int ipa3_gsi_pre_fw_load_init(void)
		{
		int result;

		result = gsi_configure_regs(ipa3_res.transport_mem_base,
		ipa3_res.transport_mem_size,
		ipa3_res.ipa_mem_base,
		ipa3_get_gsi_ver(ipa3_res.ipa_hw_type));
		if (result) {
		IPAERR("Failed to configure GSI registers\n");
		return -EINVAL;
		}

		return 0;
		}

		/**
		* ipa3_post_init() - Initialize the IPA Driver (Part II).
		* This part contains all initialization which requires interaction with
		@@ -4819,7 +4820,8 @@ static int ipa3_manual_load_ipa_fws(void)

		IPADBG("FWs are available for loading\n");

		result = ipa3_load_fws(fw, ipa3_res.transport_mem_base);
		result = ipa3_load_fws(fw, ipa3_res.transport_mem_base,
		ipa3_get_gsi_ver(ipa3_res.ipa_hw_type));
		if (result) {
		IPAERR("Manual IPA FWs loading has failed\n");
		release_firmware(fw);

drivers/platform/msm/ipa/ipa_v3/ipa_i.h

+2 −1

Original line number	Diff line number	Diff line
		@@ -2364,7 +2364,8 @@ int ipa3_uc_panic_notifier(struct notifier_block *this,
		unsigned long event, void *ptr);
		void ipa3_inc_acquire_wakelock(void);
		void ipa3_dec_release_wakelock(void);
		int ipa3_load_fws(const struct firmware *firmware, phys_addr_t gsi_mem_base);
		int ipa3_load_fws(const struct firmware *firmware, phys_addr_t gsi_mem_base,
		enum gsi_ver);
		int ipa3_register_ipa_ready_cb(void (ipa_ready_cb)(void ), void *user_data);
		const char *ipa_hw_error_str(enum ipa3_hw_errors err_type);
		int ipa_gsi_ch20_wa(void);

drivers/platform/msm/ipa/ipa_v3/ipa_utils.c

+10 −2

Original line number	Diff line number	Diff line
		@@ -5933,11 +5933,13 @@ static int ipa3_load_single_fw(const struct firmware *firmware,
		*
		* @firmware: Structure which contains the FW data from the user space.
		* @gsi_mem_base: GSI base address
		* @gsi_ver: GSI Version
		*
		* Return value: 0 on success, negative otherwise
		*
		*/
		int ipa3_load_fws(const struct firmware *firmware, phys_addr_t gsi_mem_base)
		int ipa3_load_fws(const struct firmware *firmware, phys_addr_t gsi_mem_base,
		enum gsi_ver gsi_ver)
		{
		const struct elf32_hdr *ehdr;
		const struct elf32_phdr *phdr;
		@@ -5947,6 +5949,11 @@ int ipa3_load_fws(const struct firmware *firmware, phys_addr_t gsi_mem_base)
		u32 ipa_reg_ofst;
		int rc;

		if (gsi_ver == GSI_VER_ERR) {
		IPAERR("Invalid GSI Version\n");
		return -EINVAL;
		}

		if (!gsi_mem_base) {
		IPAERR("Invalid GSI base address\n");
		return -EINVAL;
		@@ -5977,7 +5984,8 @@ int ipa3_load_fws(const struct firmware *firmware, phys_addr_t gsi_mem_base)
		*/

		/* Load GSI FW image */
		gsi_get_inst_ram_offset_and_size(&gsi_iram_ofst, &gsi_iram_size);
		gsi_get_inst_ram_offset_and_size(&gsi_iram_ofst, &gsi_iram_size,
		gsi_ver);
		if (phdr->p_vaddr != (gsi_mem_base + gsi_iram_ofst)) {
		IPAERR(
		"Invalid GSI FW img load addr vaddr=0x%x gsi_mem_base=%pa gsi_iram_ofst=0x%lx\n"