iommu: arm-smmu: clear sid in DEBUG_SID_HALT_REG during ecats

Clear the SID bits in the DEBUG_SID_HALT_REG register, so it will not carry
the old value.  Consider a case where doing ecats with sid = 7 in first
iteration and then sid = 0 in the second iteration. The existing code still
trigger a transaction with sid = 7 as we are not masking off the respective
bits.

Change-Id: Ib646533ec7a986ef541275ef95bc089111d5e335
Signed-off-by: Charan Teja Reddy <charante@codeaurora.org>
Signed-off-by: Prakash Gupta <guptap@codeaurora.org>