Loading drivers/power/supply/qcom/qpnp-smb5.c +9 −0 Original line number Diff line number Diff line Loading @@ -1955,6 +1955,15 @@ static int smb5_init_hw(struct smb5 *chip) return rc; } /* Disable DC Input missing poller function */ rc = smblib_masked_write(chg, DCIN_LOAD_CFG_REG, INPUT_MISS_POLL_EN_BIT, 0); if (rc < 0) { dev_err(chg->dev, "Couldn't disable DC Input missing poller rc=%d\n", rc); return rc; } /* * AICL configuration: * start from min and AICL ADC disable, and enable aicl rerun Loading drivers/power/supply/qcom/smb5-reg.h +3 −0 Original line number Diff line number Diff line Loading @@ -305,6 +305,9 @@ enum { #define DCIN_CMD_IL_REG (DCIN_BASE + 0x40) #define DCIN_SUSPEND_BIT BIT(0) #define DCIN_LOAD_CFG_REG (DCIN_BASE + 0x65) #define INPUT_MISS_POLL_EN_BIT BIT(5) /******************************** * TYPEC Peripheral Registers * ********************************/ Loading Loading
drivers/power/supply/qcom/qpnp-smb5.c +9 −0 Original line number Diff line number Diff line Loading @@ -1955,6 +1955,15 @@ static int smb5_init_hw(struct smb5 *chip) return rc; } /* Disable DC Input missing poller function */ rc = smblib_masked_write(chg, DCIN_LOAD_CFG_REG, INPUT_MISS_POLL_EN_BIT, 0); if (rc < 0) { dev_err(chg->dev, "Couldn't disable DC Input missing poller rc=%d\n", rc); return rc; } /* * AICL configuration: * start from min and AICL ADC disable, and enable aicl rerun Loading
drivers/power/supply/qcom/smb5-reg.h +3 −0 Original line number Diff line number Diff line Loading @@ -305,6 +305,9 @@ enum { #define DCIN_CMD_IL_REG (DCIN_BASE + 0x40) #define DCIN_SUSPEND_BIT BIT(0) #define DCIN_LOAD_CFG_REG (DCIN_BASE + 0x65) #define INPUT_MISS_POLL_EN_BIT BIT(5) /******************************** * TYPEC Peripheral Registers * ********************************/ Loading