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Commit 7ea65612 authored Dec 05, 2018 by Harry Yang

power: smb5: Disable DC Input missing poller function



Wireless parallel charging stop is observed when PM8150B buck current
runs low, triggering input missing poller.

This can happen when there is Isys load attack which causes VPH dip,
as a result, parallel charger supplys higher current but PM8150 buck
transitions into skip mode.

Fix it by disabling DC Input missing poller function.

There were concerns about accidental reverse boost with this changes,
but numerous wireless unplug events did not show it.

Change-Id: Ibefd8c21b575cecf0c79d28c9e2b75e63d17c630
Signed-off-by: Harry Yang <harryy@codeaurora.org>

parent 0885c924

drivers/power/supply/qcom/qpnp-smb5.c

+9 −0

Original line number	Original line	Diff line number	Diff line
	@@ -1914,6 +1914,15 @@ static int smb5_init_hw(struct smb5 *chip)
	return rc;		return rc;
	}		}

			/* Disable DC Input missing poller function */
			rc = smblib_masked_write(chg, DCIN_LOAD_CFG_REG,
			INPUT_MISS_POLL_EN_BIT, 0);
			if (rc < 0) {
			dev_err(chg->dev,
			"Couldn't disable DC Input missing poller rc=%d\n", rc);
			return rc;
			}

	/*		/*
	* AICL configuration:		* AICL configuration:
	* start from min and AICL ADC disable, and enable aicl rerun		* start from min and AICL ADC disable, and enable aicl rerun

drivers/power/supply/qcom/smb5-reg.h

+3 −0

Original line number	Original line	Diff line number	Diff line
	@@ -304,6 +304,9 @@ enum {
	#define DCIN_CMD_IL_REG (DCIN_BASE + 0x40)		#define DCIN_CMD_IL_REG (DCIN_BASE + 0x40)
	#define DCIN_SUSPEND_BIT BIT(0)		#define DCIN_SUSPEND_BIT BIT(0)

			#define DCIN_LOAD_CFG_REG (DCIN_BASE + 0x65)
			#define INPUT_MISS_POLL_EN_BIT BIT(5)

	/********************************		/********************************
	* TYPEC Peripheral Registers *		* TYPEC Peripheral Registers *
	********************************/		********************************/