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Commit b63617d3 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "coresight: byte-cntr: Read 64bit rwp"

parents b8ca820f 7d42028b

drivers/hwtracing/coresight/coresight-byte-cntr.c

+3 −2
Original line number Diff line number Diff line
@@ -47,7 +47,8 @@ static void tmc_etr_sg_read_pos(loff_t *ppos, 
				size_t bytes, bool noirq, size_t *len,

				char **bufpp)

{

	uint32_t rwp, i = 0;

	uint32_t i = 0;

	u64 rwp;

	uint32_t blk_num, sg_tbl_num, blk_num_loc, read_off;

	uint32_t *virt_pte, *virt_st_tbl;

	void *virt_blk;
@@ -86,7 +87,7 @@ static void tmc_etr_sg_read_pos(loff_t *ppos, 
	*bufpp = (char *)(virt_blk + read_off);



	if (noirq) {

		rwp = readl_relaxed(tmcdrvdata->base + TMC_RWP);

		rwp = tmc_read_rwp(tmcdrvdata);

		tmc_etr_sg_rwp_pos(tmcdrvdata, rwp);

		if (tmcdrvdata->sg_blk_num == blk_num &&

		    rwp >= (phys_pte + read_off))

drivers/hwtracing/coresight/coresight-tmc-etr.c

+1 −1
Original line number Diff line number Diff line
@@ -352,7 +352,7 @@ static void tmc_etr_sg_mem_reset(uint32_t *vaddr, uint32_t size) 
	tmc_etr_sg_tbl_flush(vaddr, size);

}



void tmc_etr_sg_rwp_pos(struct tmc_drvdata *drvdata, uint32_t rwp)

void tmc_etr_sg_rwp_pos(struct tmc_drvdata *drvdata, phys_addr_t rwp)

{

	uint32_t i = 0, pte_n = 0, last_pte;

	uint32_t *virt_st_tbl, *virt_pte;

drivers/hwtracing/coresight/coresight-tmc.h

+1 −1
Original line number Diff line number Diff line
@@ -271,7 +271,7 @@ int tmc_etr_bam_init(struct amba_device *adev, 
extern struct byte_cntr *byte_cntr_init(struct amba_device *adev,

					struct tmc_drvdata *drvdata);

extern const struct coresight_ops tmc_etr_cs_ops;

extern void tmc_etr_sg_rwp_pos(struct tmc_drvdata *drvdata, uint32_t rwp);

extern void tmc_etr_sg_rwp_pos(struct tmc_drvdata *drvdata, phys_addr_t rwp);



extern const struct coresight_ops tmc_etr_cs_ops;