Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +23 −2 Original line number Diff line number Diff line Loading @@ -1584,6 +1584,18 @@ static int dsi_disable_ulps(struct dsi_ctrl *dsi_ctrl) return rc; } static void dsi_ctrl_enable_error_interrupts(struct dsi_ctrl *dsi_ctrl) { if (dsi_ctrl->host_config.panel_mode == DSI_OP_VIDEO_MODE && !dsi_ctrl->host_config.u.video_engine.bllp_lp11_en && !dsi_ctrl->host_config.u.video_engine.eof_bllp_lp11_en) dsi_ctrl->hw.ops.enable_error_interrupts(&dsi_ctrl->hw, 0xFF00A0); else dsi_ctrl->hw.ops.enable_error_interrupts(&dsi_ctrl->hw, 0xFF00E0); } static int dsi_ctrl_drv_state_init(struct dsi_ctrl *dsi_ctrl) { int rc = 0; Loading Loading @@ -2194,7 +2206,9 @@ int dsi_ctrl_setup(struct dsi_ctrl *dsi_ctrl) } dsi_ctrl->hw.ops.enable_status_interrupts(&dsi_ctrl->hw, 0x0); dsi_ctrl->hw.ops.enable_error_interrupts(&dsi_ctrl->hw, 0xFF00E0); dsi_ctrl_enable_error_interrupts(dsi_ctrl); dsi_ctrl->hw.ops.ctrl_en(&dsi_ctrl->hw, true); mutex_unlock(&dsi_ctrl->ctrl_lock); Loading Loading @@ -2317,6 +2331,12 @@ static void dsi_ctrl_handle_error_status(struct dsi_ctrl *dsi_ctrl, if (error & 0x3000E00) pr_err("dsi PHY contention error: 0x%lx\n", error); /* ignore TX timeout if blpp_lp11 is disabled */ if (dsi_ctrl->host_config.panel_mode == DSI_OP_VIDEO_MODE && !dsi_ctrl->host_config.u.video_engine.bllp_lp11_en && !dsi_ctrl->host_config.u.video_engine.eof_bllp_lp11_en) error &= ~DSI_HS_TX_TIMEOUT; /* TX timeout error */ if (error & 0xE0) { if (error & 0xA0) { Loading Loading @@ -2707,7 +2727,8 @@ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl, bool is_splash_enabled) } dsi_ctrl->hw.ops.enable_status_interrupts(&dsi_ctrl->hw, 0x0); dsi_ctrl->hw.ops.enable_error_interrupts(&dsi_ctrl->hw, 0xFF00E0); dsi_ctrl_enable_error_interrupts(dsi_ctrl); pr_debug("[DSI_%d]Host initialization complete, continuous splash status:%d\n", dsi_ctrl->cell_index, is_splash_enabled); Loading Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +23 −2 Original line number Diff line number Diff line Loading @@ -1584,6 +1584,18 @@ static int dsi_disable_ulps(struct dsi_ctrl *dsi_ctrl) return rc; } static void dsi_ctrl_enable_error_interrupts(struct dsi_ctrl *dsi_ctrl) { if (dsi_ctrl->host_config.panel_mode == DSI_OP_VIDEO_MODE && !dsi_ctrl->host_config.u.video_engine.bllp_lp11_en && !dsi_ctrl->host_config.u.video_engine.eof_bllp_lp11_en) dsi_ctrl->hw.ops.enable_error_interrupts(&dsi_ctrl->hw, 0xFF00A0); else dsi_ctrl->hw.ops.enable_error_interrupts(&dsi_ctrl->hw, 0xFF00E0); } static int dsi_ctrl_drv_state_init(struct dsi_ctrl *dsi_ctrl) { int rc = 0; Loading Loading @@ -2194,7 +2206,9 @@ int dsi_ctrl_setup(struct dsi_ctrl *dsi_ctrl) } dsi_ctrl->hw.ops.enable_status_interrupts(&dsi_ctrl->hw, 0x0); dsi_ctrl->hw.ops.enable_error_interrupts(&dsi_ctrl->hw, 0xFF00E0); dsi_ctrl_enable_error_interrupts(dsi_ctrl); dsi_ctrl->hw.ops.ctrl_en(&dsi_ctrl->hw, true); mutex_unlock(&dsi_ctrl->ctrl_lock); Loading Loading @@ -2317,6 +2331,12 @@ static void dsi_ctrl_handle_error_status(struct dsi_ctrl *dsi_ctrl, if (error & 0x3000E00) pr_err("dsi PHY contention error: 0x%lx\n", error); /* ignore TX timeout if blpp_lp11 is disabled */ if (dsi_ctrl->host_config.panel_mode == DSI_OP_VIDEO_MODE && !dsi_ctrl->host_config.u.video_engine.bllp_lp11_en && !dsi_ctrl->host_config.u.video_engine.eof_bllp_lp11_en) error &= ~DSI_HS_TX_TIMEOUT; /* TX timeout error */ if (error & 0xE0) { if (error & 0xA0) { Loading Loading @@ -2707,7 +2727,8 @@ int dsi_ctrl_host_init(struct dsi_ctrl *dsi_ctrl, bool is_splash_enabled) } dsi_ctrl->hw.ops.enable_status_interrupts(&dsi_ctrl->hw, 0x0); dsi_ctrl->hw.ops.enable_error_interrupts(&dsi_ctrl->hw, 0xFF00E0); dsi_ctrl_enable_error_interrupts(dsi_ctrl); pr_debug("[DSI_%d]Host initialization complete, continuous splash status:%d\n", dsi_ctrl->cell_index, is_splash_enabled); Loading