Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +15 −21 Original line number Diff line number Diff line Loading @@ -43,22 +43,6 @@ #define TICKS_IN_MICRO_SECOND 1000000 /** * enum dsi_ctrl_driver_ops - controller driver ops */ enum dsi_ctrl_driver_ops { DSI_CTRL_OP_POWER_STATE_CHANGE, DSI_CTRL_OP_CMD_ENGINE, DSI_CTRL_OP_VID_ENGINE, DSI_CTRL_OP_HOST_ENGINE, DSI_CTRL_OP_CMD_TX, DSI_CTRL_OP_HOST_INIT, DSI_CTRL_OP_TPG, DSI_CTRL_OP_PHY_SW_RESET, DSI_CTRL_OP_ASYNC_TIMING, DSI_CTRL_OP_MAX }; struct dsi_ctrl_list_item { struct dsi_ctrl *ctrl; struct list_head list; Loading Loading @@ -2630,27 +2614,37 @@ int dsi_ctrl_host_timing_update(struct dsi_ctrl *dsi_ctrl) } /** * dsi_ctrl_update_host_init_state() - Update the host initialization state. * dsi_ctrl_update_host_state() - Update the host state. * @dsi_ctrl: DSI controller handle. * @op: ctrl driver ops * @enable: boolean signifying host state. * * Update the host initialization status only while exiting from ulps during * Update the host status only while exiting from ulps during * suspend state. * * Return: error code. */ int dsi_ctrl_update_host_init_state(struct dsi_ctrl *dsi_ctrl, bool enable) int dsi_ctrl_update_host_state(struct dsi_ctrl *dsi_ctrl, enum dsi_ctrl_driver_ops op, bool enable) { int rc = 0; u32 state = enable ? 0x1 : 0x0; rc = dsi_ctrl_check_state(dsi_ctrl, DSI_CTRL_OP_HOST_INIT, state); if (!dsi_ctrl) return rc; mutex_lock(&dsi_ctrl->ctrl_lock); rc = dsi_ctrl_check_state(dsi_ctrl, op, state); if (rc) { pr_err("[DSI_%d] Controller state check failed, rc=%d\n", dsi_ctrl->cell_index, rc); mutex_unlock(&dsi_ctrl->ctrl_lock); return rc; } dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_HOST_INIT, state); dsi_ctrl_update_state(dsi_ctrl, op, state); mutex_unlock(&dsi_ctrl->ctrl_lock); return rc; } Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.h +20 −2 Original line number Diff line number Diff line Loading @@ -84,6 +84,23 @@ enum dsi_engine_state { DSI_CTRL_ENGINE_MAX, }; /** * enum dsi_ctrl_driver_ops - controller driver ops */ enum dsi_ctrl_driver_ops { DSI_CTRL_OP_POWER_STATE_CHANGE, DSI_CTRL_OP_CMD_ENGINE, DSI_CTRL_OP_VID_ENGINE, DSI_CTRL_OP_HOST_ENGINE, DSI_CTRL_OP_CMD_TX, DSI_CTRL_OP_HOST_INIT, DSI_CTRL_OP_TPG, DSI_CTRL_OP_PHY_SW_RESET, DSI_CTRL_OP_ASYNC_TIMING, DSI_CTRL_OP_MAX }; /** * struct dsi_ctrl_power_info - digital and analog power supplies for dsi host * @digital: Digital power supply required to turn on DSI controller hardware. Loading Loading @@ -790,9 +807,10 @@ int dsi_ctrl_get_host_engine_init_state(struct dsi_ctrl *dsi_ctrl, */ int dsi_ctrl_wait_for_cmd_mode_mdp_idle(struct dsi_ctrl *dsi_ctrl); /** * dsi_ctrl_update_host_init_state() - Set the host initialization state * dsi_ctrl_update_host_state() - Set the host state */ int dsi_ctrl_update_host_init_state(struct dsi_ctrl *dsi_ctrl, bool en); int dsi_ctrl_update_host_state(struct dsi_ctrl *dsi_ctrl, enum dsi_ctrl_driver_ops op, bool en); /** * dsi_ctrl_pixel_format_to_bpp() - returns number of bits per pxl Loading drivers/gpu/drm/msm/dsi-staging/dsi_display.c +22 −1 Original line number Diff line number Diff line Loading @@ -2384,7 +2384,9 @@ static int dsi_display_ctrl_init(struct dsi_display *display) } else { display_for_each_ctrl(i, display) { ctrl = &display->ctrl[i]; rc = dsi_ctrl_update_host_init_state(ctrl->ctrl, true); rc = dsi_ctrl_update_host_state(ctrl->ctrl, DSI_CTRL_OP_HOST_INIT, true); if (rc) pr_debug("host init update failed rc=%d\n", rc); } Loading Loading @@ -2468,6 +2470,25 @@ static int dsi_display_ctrl_host_disable(struct dsi_display *display) struct dsi_display_ctrl *m_ctrl, *ctrl; m_ctrl = &display->ctrl[display->cmd_master_idx]; /* * For platforms where ULPS is controlled by DSI controller block, * do not disable dsi controller block if lanes are to be * kept in ULPS during suspend. So just update the SW state * and return early. */ if (display->panel->ulps_suspend_enabled && !m_ctrl->phy->hw.ops.ulps_ops.ulps_request) { display_for_each_ctrl(i, display) { ctrl = &display->ctrl[i]; rc = dsi_ctrl_update_host_state(ctrl->ctrl, DSI_CTRL_OP_HOST_ENGINE, false); if (rc) pr_debug("host state update failed %d\n", rc); } return rc; } display_for_each_ctrl(i, display) { ctrl = &display->ctrl[i]; if (!ctrl->ctrl || (ctrl == m_ctrl)) Loading Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +15 −21 Original line number Diff line number Diff line Loading @@ -43,22 +43,6 @@ #define TICKS_IN_MICRO_SECOND 1000000 /** * enum dsi_ctrl_driver_ops - controller driver ops */ enum dsi_ctrl_driver_ops { DSI_CTRL_OP_POWER_STATE_CHANGE, DSI_CTRL_OP_CMD_ENGINE, DSI_CTRL_OP_VID_ENGINE, DSI_CTRL_OP_HOST_ENGINE, DSI_CTRL_OP_CMD_TX, DSI_CTRL_OP_HOST_INIT, DSI_CTRL_OP_TPG, DSI_CTRL_OP_PHY_SW_RESET, DSI_CTRL_OP_ASYNC_TIMING, DSI_CTRL_OP_MAX }; struct dsi_ctrl_list_item { struct dsi_ctrl *ctrl; struct list_head list; Loading Loading @@ -2630,27 +2614,37 @@ int dsi_ctrl_host_timing_update(struct dsi_ctrl *dsi_ctrl) } /** * dsi_ctrl_update_host_init_state() - Update the host initialization state. * dsi_ctrl_update_host_state() - Update the host state. * @dsi_ctrl: DSI controller handle. * @op: ctrl driver ops * @enable: boolean signifying host state. * * Update the host initialization status only while exiting from ulps during * Update the host status only while exiting from ulps during * suspend state. * * Return: error code. */ int dsi_ctrl_update_host_init_state(struct dsi_ctrl *dsi_ctrl, bool enable) int dsi_ctrl_update_host_state(struct dsi_ctrl *dsi_ctrl, enum dsi_ctrl_driver_ops op, bool enable) { int rc = 0; u32 state = enable ? 0x1 : 0x0; rc = dsi_ctrl_check_state(dsi_ctrl, DSI_CTRL_OP_HOST_INIT, state); if (!dsi_ctrl) return rc; mutex_lock(&dsi_ctrl->ctrl_lock); rc = dsi_ctrl_check_state(dsi_ctrl, op, state); if (rc) { pr_err("[DSI_%d] Controller state check failed, rc=%d\n", dsi_ctrl->cell_index, rc); mutex_unlock(&dsi_ctrl->ctrl_lock); return rc; } dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_HOST_INIT, state); dsi_ctrl_update_state(dsi_ctrl, op, state); mutex_unlock(&dsi_ctrl->ctrl_lock); return rc; } Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.h +20 −2 Original line number Diff line number Diff line Loading @@ -84,6 +84,23 @@ enum dsi_engine_state { DSI_CTRL_ENGINE_MAX, }; /** * enum dsi_ctrl_driver_ops - controller driver ops */ enum dsi_ctrl_driver_ops { DSI_CTRL_OP_POWER_STATE_CHANGE, DSI_CTRL_OP_CMD_ENGINE, DSI_CTRL_OP_VID_ENGINE, DSI_CTRL_OP_HOST_ENGINE, DSI_CTRL_OP_CMD_TX, DSI_CTRL_OP_HOST_INIT, DSI_CTRL_OP_TPG, DSI_CTRL_OP_PHY_SW_RESET, DSI_CTRL_OP_ASYNC_TIMING, DSI_CTRL_OP_MAX }; /** * struct dsi_ctrl_power_info - digital and analog power supplies for dsi host * @digital: Digital power supply required to turn on DSI controller hardware. Loading Loading @@ -790,9 +807,10 @@ int dsi_ctrl_get_host_engine_init_state(struct dsi_ctrl *dsi_ctrl, */ int dsi_ctrl_wait_for_cmd_mode_mdp_idle(struct dsi_ctrl *dsi_ctrl); /** * dsi_ctrl_update_host_init_state() - Set the host initialization state * dsi_ctrl_update_host_state() - Set the host state */ int dsi_ctrl_update_host_init_state(struct dsi_ctrl *dsi_ctrl, bool en); int dsi_ctrl_update_host_state(struct dsi_ctrl *dsi_ctrl, enum dsi_ctrl_driver_ops op, bool en); /** * dsi_ctrl_pixel_format_to_bpp() - returns number of bits per pxl Loading
drivers/gpu/drm/msm/dsi-staging/dsi_display.c +22 −1 Original line number Diff line number Diff line Loading @@ -2384,7 +2384,9 @@ static int dsi_display_ctrl_init(struct dsi_display *display) } else { display_for_each_ctrl(i, display) { ctrl = &display->ctrl[i]; rc = dsi_ctrl_update_host_init_state(ctrl->ctrl, true); rc = dsi_ctrl_update_host_state(ctrl->ctrl, DSI_CTRL_OP_HOST_INIT, true); if (rc) pr_debug("host init update failed rc=%d\n", rc); } Loading Loading @@ -2468,6 +2470,25 @@ static int dsi_display_ctrl_host_disable(struct dsi_display *display) struct dsi_display_ctrl *m_ctrl, *ctrl; m_ctrl = &display->ctrl[display->cmd_master_idx]; /* * For platforms where ULPS is controlled by DSI controller block, * do not disable dsi controller block if lanes are to be * kept in ULPS during suspend. So just update the SW state * and return early. */ if (display->panel->ulps_suspend_enabled && !m_ctrl->phy->hw.ops.ulps_ops.ulps_request) { display_for_each_ctrl(i, display) { ctrl = &display->ctrl[i]; rc = dsi_ctrl_update_host_state(ctrl->ctrl, DSI_CTRL_OP_HOST_ENGINE, false); if (rc) pr_debug("host state update failed %d\n", rc); } return rc; } display_for_each_ctrl(i, display) { ctrl = &display->ctrl[i]; if (!ctrl->ctrl || (ctrl == m_ctrl)) Loading