Loading msm/vidc/hfi_common.c +10 −43 Original line number Diff line number Diff line Loading @@ -2141,34 +2141,6 @@ static int venus_hfi_core_release(void *dev) return rc; } static int __get_q_size(struct venus_hfi_device *dev, unsigned int q_index) { struct hfi_queue_header *queue; struct vidc_iface_q_info *q_info; u32 write_ptr, read_ptr; if (q_index >= VIDC_IFACEQ_NUMQ) { d_vpr_e("Invalid q index: %d\n", q_index); return -ENOENT; } q_info = &dev->iface_queues[q_index]; if (!q_info) { d_vpr_e("cannot read shared Q's\n"); return -ENOENT; } queue = (struct hfi_queue_header *)q_info->q_hdr; if (!queue) { d_vpr_e("queue not present\n"); return -ENOENT; } write_ptr = (u32)queue->qhdr_write_idx; read_ptr = (u32)queue->qhdr_read_idx; return read_ptr - write_ptr; } static void __core_clear_interrupt_common(struct venus_hfi_device *device) { u32 intr_status = 0, mask = 0; Loading Loading @@ -3097,20 +3069,19 @@ static int __power_collapse(struct venus_hfi_device *device, bool force) return -EAGAIN; } static void __process_sys_error(struct venus_hfi_device *device) static void print_sfr_message(struct venus_hfi_device *device) { struct hfi_sfr_struct *vsfr = NULL; u32 vsfr_size = 0; void *p = NULL; vsfr = (struct hfi_sfr_struct *)device->sfr.align_virtual_addr; if (vsfr) { void *p = memchr(vsfr->rg_data, '\0', vsfr->bufSize); /* * SFR isn't guaranteed to be NULL terminated * since SYS_ERROR indicates that Venus is in the * process of crashing. */ vsfr_size = vsfr->bufSize - sizeof(u32); p = memchr(vsfr->rg_data, '\0', vsfr_size); /* SFR isn't guaranteed to be NULL terminated */ if (p == NULL) vsfr->rg_data[vsfr->bufSize - 1] = '\0'; vsfr->rg_data[vsfr_size - 1] = '\0'; d_vpr_e("SFR Message from FW: %s\n", vsfr->rg_data); } Loading Loading @@ -3261,8 +3232,6 @@ static int __response_handler(struct venus_hfi_device *device) } if (call_venus_op(device, watchdog, device->intr_status)) { struct hfi_sfr_struct *vsfr = (struct hfi_sfr_struct *) device->sfr.align_virtual_addr; struct msm_vidc_cb_info info = { .response_type = HAL_SYS_WATCHDOG_TIMEOUT, .response.cmd = { Loading @@ -3270,8 +3239,7 @@ static int __response_handler(struct venus_hfi_device *device) } }; if (vsfr) d_vpr_e("SFR Message from FW: %s\n", vsfr->rg_data); print_sfr_message(device); d_vpr_e("Received watchdog timeout\n"); packets[packet_count++] = info; Loading @@ -3295,7 +3263,7 @@ static int __response_handler(struct venus_hfi_device *device) /* Process the packet types that we're interested in */ switch (info->response_type) { case HAL_SYS_ERROR: __process_sys_error(device); print_sfr_message(device); break; case HAL_SYS_RELEASE_RESOURCE_DONE: d_vpr_h("Received SYS_RELEASE_RESOURCE\n"); Loading Loading @@ -3369,8 +3337,7 @@ static int __response_handler(struct venus_hfi_device *device) *inst_id = session->inst_id; } if (packet_count >= max_packets && __get_q_size(device, VIDC_IFACEQ_MSGQ_IDX)) { if (packet_count >= max_packets) { d_vpr_e( "Too many packets in message queue to handle at once, deferring read\n"); break; Loading msm/vidc/msm_venc.c +1 −1 Original line number Diff line number Diff line Loading @@ -1271,7 +1271,7 @@ static int msm_venc_set_csc(struct msm_vidc_inst *inst, vpe_csc.input_color_primaries = color_primaries; /* Custom bias, matrix & limit */ vpe_csc.custom_matrix_enabled = custom_matrix; vpe_csc.custom_matrix_enabled = custom_matrix ? 7 : 0; if (vpe_csc.custom_matrix_enabled && bias_coeff != NULL && csc_limit != NULL && csc_matrix != NULL) { Loading msm/vidc/msm_vidc_platform.c +143 −12 Original line number Diff line number Diff line Loading @@ -361,14 +361,74 @@ static struct msm_vidc_codec_capability lito_capabilities_v1[] = { V4L2_MPEG_VIDEO_HEVC_LEVEL_5}, }; static struct msm_vidc_codec_capability bengal_capabilities[] = { static struct msm_vidc_codec_capability bengal_capabilities_v0[] = { /* {cap_type, domains, codecs, min, max, step_size, default_value} */ {CAP_FRAME_WIDTH, DOMAINS_ALL, CODECS_ALL, 128, 1920, 1, 1920}, {CAP_FRAME_HEIGHT, DOMAINS_ALL, CODECS_ALL, 128, 1920, 1, 1080}, /* ((1920 * 1088) / 256) */ {CAP_MBS_PER_FRAME, DOMAINS_ALL, CODECS_ALL, 64, 8160, 1, 8160}, /* 1080@30 decode + 1080@30 encode */ {CAP_MBS_PER_SECOND, DOMAINS_ALL, CODECS_ALL, 64, 486000, 1, 243000}, {CAP_MBS_PER_SECOND, DOMAINS_ALL, CODECS_ALL, 64, 489600, 1, 244800}, {CAP_FRAMERATE, DOMAINS_ALL, CODECS_ALL, 1, 120, 1, 30}, {CAP_BITRATE, DOMAINS_ALL, CODECS_ALL, 1, 60000000, 1, 20000000}, {CAP_HIER_P_NUM_ENH_LAYERS, ENC, H264|HEVC, 0, 6, 1, 0}, {CAP_LTR_COUNT, ENC, H264|HEVC, 0, 4, 1, 0}, /* ((1920 * 1088) / 256) * 30 fps */ {CAP_MBS_PER_SECOND_POWER_SAVE, ENC, CODECS_ALL, 0, 244800, 1, 244800}, {CAP_CABAC_BITRATE, ENC, H264, 1, 60000000, 1, 20000000}, {CAP_I_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 10}, {CAP_P_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 20}, {CAP_B_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 20}, /* 10 slices */ {CAP_SLICE_BYTE, ENC, H264|HEVC, 1, 10, 1, 10}, {CAP_SLICE_MB, ENC, H264|HEVC, 1, 10, 1, 10}, {CAP_MAX_VIDEOCORES, DOMAINS_ALL, CODECS_ALL, 0, 1, 1, 1}, /* Secure usecase specific */ {CAP_SECURE_FRAME_WIDTH, DOMAINS_ALL, CODECS_ALL, 128, 1920, 1, 1920}, {CAP_SECURE_FRAME_HEIGHT, DOMAINS_ALL, CODECS_ALL, 128, 1920, 1, 1080}, /* (1920 * 1088) / 256 */ {CAP_SECURE_MBS_PER_FRAME, DOMAINS_ALL, CODECS_ALL, 64, 8160, 1, 8160}, {CAP_SECURE_BITRATE, DOMAINS_ALL, CODECS_ALL, 1, 35000000, 1, 20000000}, /* Image specific */ {CAP_HEVC_IMAGE_FRAME_WIDTH, ENC, HEVC, 128, 512, 1, 512}, {CAP_HEVC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 128, 512, 1, 512}, {CAP_HEIC_IMAGE_FRAME_WIDTH, ENC, HEVC, 512, 8192, 1, 8192}, {CAP_HEIC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 512, 8192, 1, 8192}, /* Level for AVC and HEVC encoder specific. * Default for levels is UNKNOWN value. But if we use unknown * value here to set as default, max value needs to be set to * unknown as well, which creates a problem of allowing client * to set higher level than supported */ {CAP_H264_LEVEL, ENC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, V4L2_MPEG_VIDEO_H264_LEVEL_5_0, 1, V4L2_MPEG_VIDEO_H264_LEVEL_4_1}, {CAP_HEVC_LEVEL, ENC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1, V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1}, /* Level for AVC and HEVC decoder specific */ {CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, V4L2_MPEG_VIDEO_H264_LEVEL_5_0, 1, V4L2_MPEG_VIDEO_H264_LEVEL_4_1}, {CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1, V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1}, }; static struct msm_vidc_codec_capability bengal_capabilities_v1[] = { /* {cap_type, domains, codecs, min, max, step_size, default_value} */ {CAP_FRAME_WIDTH, DOMAINS_ALL, CODECS_ALL, 128, 1920, 1, 1920}, {CAP_FRAME_HEIGHT, DOMAINS_ALL, CODECS_ALL, 128, 1920, 1, 1080}, /* ((1920 * 1088) / 256) */ {CAP_MBS_PER_FRAME, DOMAINS_ALL, CODECS_ALL, 64, 8160, 1, 8160}, /* 1920*1088 @30fps */ {CAP_MBS_PER_SECOND, DOMAINS_ALL, CODECS_ALL, 64, 244800, 1, 244800}, {CAP_FRAMERATE, DOMAINS_ALL, CODECS_ALL, 1, 120, 1, 30}, {CAP_BITRATE, DOMAINS_ALL, CODECS_ALL, 1, 60000000, 1, 20000000}, {CAP_HIER_P_NUM_ENH_LAYERS, ENC, H264|HEVC, 0, 6, 1, 0}, Loading Loading @@ -858,7 +918,7 @@ static struct msm_vidc_common_data sm6150_common_data[] = { }, }; static struct msm_vidc_common_data bengal_common_data[] = { static struct msm_vidc_common_data bengal_common_data_v0[] = { { .key = "qcom,never-unload-fw", .value = 1, Loading @@ -873,11 +933,11 @@ static struct msm_vidc_common_data bengal_common_data[] = { }, { .key = "qcom,max-secure-instances", .value = 5, .value = 3, }, { .key = "qcom,max-hw-load", .value = 1216800, .value = 489600, }, { .key = "qcom,max-hq-mbs-per-frame", Loading @@ -888,12 +948,55 @@ static struct msm_vidc_common_data bengal_common_data[] = { .value = 244800, /* 1920 x 1088 @ 30 fps */ }, { .key = "qcom,max-b-frame-mbs-per-frame", .key = "qcom,power-collapse-delay", .value = 1500, }, { .key = "qcom,hw-resp-timeout", .value = 1000, }, { .key = "qcom,dcvs", .value = 1, }, { .key = "qcom,fw-cycles", .value = 733003, }, { .key = "qcom,fw-vpp-cycles", .value = 225975, }, }; static struct msm_vidc_common_data bengal_common_data_v1[] = { { .key = "qcom,never-unload-fw", .value = 1, }, { .key = "qcom,sw-power-collapse", .value = 1, }, { .key = "qcom,domain-attr-non-fatal-faults", .value = 1, }, { .key = "qcom,max-secure-instances", .value = 3, }, { .key = "qcom,max-hw-load", .value = 244800, }, { .key = "qcom,max-hq-mbs-per-frame", .value = 8160, }, { .key = "qcom,max-b-frame-mbs-per-sec", .value = 489600, .key = "qcom,max-hq-mbs-per-sec", .value = 244800, /* 1920 x 1088 @ 30 fps */ }, { .key = "qcom,power-collapse-delay", Loading Loading @@ -1249,8 +1352,8 @@ static struct msm_vidc_platform_data sm6150_data = { static struct msm_vidc_platform_data bengal_data = { .codec_data = bengal_codec_data, .codec_data_length = ARRAY_SIZE(bengal_codec_data), .common_data = bengal_common_data, .common_data_length = ARRAY_SIZE(bengal_common_data), .common_data = bengal_common_data_v0, .common_data_length = ARRAY_SIZE(bengal_common_data_v0), .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, Loading @@ -1261,8 +1364,8 @@ static struct msm_vidc_platform_data bengal_data = { .ubwc_config = 0x0, .codecs = bengal_codecs, .codecs_count = ARRAY_SIZE(bengal_codecs), .codec_caps = bengal_capabilities, .codec_caps_count = ARRAY_SIZE(bengal_capabilities), .codec_caps = bengal_capabilities_v0, .codec_caps_count = ARRAY_SIZE(bengal_capabilities_v0), }; static struct msm_vidc_platform_data sm8150_data = { Loading Loading @@ -1385,6 +1488,20 @@ static int msm_vidc_read_efuse( return 0; } static int msm_vidc_read_rank( struct msm_vidc_platform_data *data, struct device *dev) { uint32_t num_ranks; num_ranks = 0; //TO-DO Read Rank API to be added data->sku_version = SKU_VERSION_0; if (num_ranks == 1) data->sku_version = SKU_VERSION_1; return 0; } void *vidc_get_drv_data(struct device *dev) { struct msm_vidc_platform_data *driver_data = NULL; Loading Loading @@ -1440,6 +1557,20 @@ void *vidc_get_drv_data(struct device *dev) d_vpr_h("DDR Type 0x%x hbb 0x%x\n", ddr_type, driver_data->ubwc_config ? driver_data->ubwc_config->highest_bank_bit : -1); } else if (!strcmp(match->compatible, "qcom,bengal-vidc")) { rc = msm_vidc_read_rank(driver_data, dev); if (rc) { d_vpr_e("Failed to get ddr rank, use Dual Rank DDR\n"); goto exit; } if (driver_data->sku_version == SKU_VERSION_1) { driver_data->common_data = bengal_common_data_v1; driver_data->common_data_length = ARRAY_SIZE(bengal_common_data_v1); driver_data->codec_caps = bengal_capabilities_v1; driver_data->codec_caps_count = ARRAY_SIZE(bengal_capabilities_v1); } } exit: Loading Loading
msm/vidc/hfi_common.c +10 −43 Original line number Diff line number Diff line Loading @@ -2141,34 +2141,6 @@ static int venus_hfi_core_release(void *dev) return rc; } static int __get_q_size(struct venus_hfi_device *dev, unsigned int q_index) { struct hfi_queue_header *queue; struct vidc_iface_q_info *q_info; u32 write_ptr, read_ptr; if (q_index >= VIDC_IFACEQ_NUMQ) { d_vpr_e("Invalid q index: %d\n", q_index); return -ENOENT; } q_info = &dev->iface_queues[q_index]; if (!q_info) { d_vpr_e("cannot read shared Q's\n"); return -ENOENT; } queue = (struct hfi_queue_header *)q_info->q_hdr; if (!queue) { d_vpr_e("queue not present\n"); return -ENOENT; } write_ptr = (u32)queue->qhdr_write_idx; read_ptr = (u32)queue->qhdr_read_idx; return read_ptr - write_ptr; } static void __core_clear_interrupt_common(struct venus_hfi_device *device) { u32 intr_status = 0, mask = 0; Loading Loading @@ -3097,20 +3069,19 @@ static int __power_collapse(struct venus_hfi_device *device, bool force) return -EAGAIN; } static void __process_sys_error(struct venus_hfi_device *device) static void print_sfr_message(struct venus_hfi_device *device) { struct hfi_sfr_struct *vsfr = NULL; u32 vsfr_size = 0; void *p = NULL; vsfr = (struct hfi_sfr_struct *)device->sfr.align_virtual_addr; if (vsfr) { void *p = memchr(vsfr->rg_data, '\0', vsfr->bufSize); /* * SFR isn't guaranteed to be NULL terminated * since SYS_ERROR indicates that Venus is in the * process of crashing. */ vsfr_size = vsfr->bufSize - sizeof(u32); p = memchr(vsfr->rg_data, '\0', vsfr_size); /* SFR isn't guaranteed to be NULL terminated */ if (p == NULL) vsfr->rg_data[vsfr->bufSize - 1] = '\0'; vsfr->rg_data[vsfr_size - 1] = '\0'; d_vpr_e("SFR Message from FW: %s\n", vsfr->rg_data); } Loading Loading @@ -3261,8 +3232,6 @@ static int __response_handler(struct venus_hfi_device *device) } if (call_venus_op(device, watchdog, device->intr_status)) { struct hfi_sfr_struct *vsfr = (struct hfi_sfr_struct *) device->sfr.align_virtual_addr; struct msm_vidc_cb_info info = { .response_type = HAL_SYS_WATCHDOG_TIMEOUT, .response.cmd = { Loading @@ -3270,8 +3239,7 @@ static int __response_handler(struct venus_hfi_device *device) } }; if (vsfr) d_vpr_e("SFR Message from FW: %s\n", vsfr->rg_data); print_sfr_message(device); d_vpr_e("Received watchdog timeout\n"); packets[packet_count++] = info; Loading @@ -3295,7 +3263,7 @@ static int __response_handler(struct venus_hfi_device *device) /* Process the packet types that we're interested in */ switch (info->response_type) { case HAL_SYS_ERROR: __process_sys_error(device); print_sfr_message(device); break; case HAL_SYS_RELEASE_RESOURCE_DONE: d_vpr_h("Received SYS_RELEASE_RESOURCE\n"); Loading Loading @@ -3369,8 +3337,7 @@ static int __response_handler(struct venus_hfi_device *device) *inst_id = session->inst_id; } if (packet_count >= max_packets && __get_q_size(device, VIDC_IFACEQ_MSGQ_IDX)) { if (packet_count >= max_packets) { d_vpr_e( "Too many packets in message queue to handle at once, deferring read\n"); break; Loading
msm/vidc/msm_venc.c +1 −1 Original line number Diff line number Diff line Loading @@ -1271,7 +1271,7 @@ static int msm_venc_set_csc(struct msm_vidc_inst *inst, vpe_csc.input_color_primaries = color_primaries; /* Custom bias, matrix & limit */ vpe_csc.custom_matrix_enabled = custom_matrix; vpe_csc.custom_matrix_enabled = custom_matrix ? 7 : 0; if (vpe_csc.custom_matrix_enabled && bias_coeff != NULL && csc_limit != NULL && csc_matrix != NULL) { Loading
msm/vidc/msm_vidc_platform.c +143 −12 Original line number Diff line number Diff line Loading @@ -361,14 +361,74 @@ static struct msm_vidc_codec_capability lito_capabilities_v1[] = { V4L2_MPEG_VIDEO_HEVC_LEVEL_5}, }; static struct msm_vidc_codec_capability bengal_capabilities[] = { static struct msm_vidc_codec_capability bengal_capabilities_v0[] = { /* {cap_type, domains, codecs, min, max, step_size, default_value} */ {CAP_FRAME_WIDTH, DOMAINS_ALL, CODECS_ALL, 128, 1920, 1, 1920}, {CAP_FRAME_HEIGHT, DOMAINS_ALL, CODECS_ALL, 128, 1920, 1, 1080}, /* ((1920 * 1088) / 256) */ {CAP_MBS_PER_FRAME, DOMAINS_ALL, CODECS_ALL, 64, 8160, 1, 8160}, /* 1080@30 decode + 1080@30 encode */ {CAP_MBS_PER_SECOND, DOMAINS_ALL, CODECS_ALL, 64, 486000, 1, 243000}, {CAP_MBS_PER_SECOND, DOMAINS_ALL, CODECS_ALL, 64, 489600, 1, 244800}, {CAP_FRAMERATE, DOMAINS_ALL, CODECS_ALL, 1, 120, 1, 30}, {CAP_BITRATE, DOMAINS_ALL, CODECS_ALL, 1, 60000000, 1, 20000000}, {CAP_HIER_P_NUM_ENH_LAYERS, ENC, H264|HEVC, 0, 6, 1, 0}, {CAP_LTR_COUNT, ENC, H264|HEVC, 0, 4, 1, 0}, /* ((1920 * 1088) / 256) * 30 fps */ {CAP_MBS_PER_SECOND_POWER_SAVE, ENC, CODECS_ALL, 0, 244800, 1, 244800}, {CAP_CABAC_BITRATE, ENC, H264, 1, 60000000, 1, 20000000}, {CAP_I_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 10}, {CAP_P_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 20}, {CAP_B_FRAME_QP, ENC, H264|HEVC, 0, 51, 1, 20}, /* 10 slices */ {CAP_SLICE_BYTE, ENC, H264|HEVC, 1, 10, 1, 10}, {CAP_SLICE_MB, ENC, H264|HEVC, 1, 10, 1, 10}, {CAP_MAX_VIDEOCORES, DOMAINS_ALL, CODECS_ALL, 0, 1, 1, 1}, /* Secure usecase specific */ {CAP_SECURE_FRAME_WIDTH, DOMAINS_ALL, CODECS_ALL, 128, 1920, 1, 1920}, {CAP_SECURE_FRAME_HEIGHT, DOMAINS_ALL, CODECS_ALL, 128, 1920, 1, 1080}, /* (1920 * 1088) / 256 */ {CAP_SECURE_MBS_PER_FRAME, DOMAINS_ALL, CODECS_ALL, 64, 8160, 1, 8160}, {CAP_SECURE_BITRATE, DOMAINS_ALL, CODECS_ALL, 1, 35000000, 1, 20000000}, /* Image specific */ {CAP_HEVC_IMAGE_FRAME_WIDTH, ENC, HEVC, 128, 512, 1, 512}, {CAP_HEVC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 128, 512, 1, 512}, {CAP_HEIC_IMAGE_FRAME_WIDTH, ENC, HEVC, 512, 8192, 1, 8192}, {CAP_HEIC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 512, 8192, 1, 8192}, /* Level for AVC and HEVC encoder specific. * Default for levels is UNKNOWN value. But if we use unknown * value here to set as default, max value needs to be set to * unknown as well, which creates a problem of allowing client * to set higher level than supported */ {CAP_H264_LEVEL, ENC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, V4L2_MPEG_VIDEO_H264_LEVEL_5_0, 1, V4L2_MPEG_VIDEO_H264_LEVEL_4_1}, {CAP_HEVC_LEVEL, ENC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1, V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1}, /* Level for AVC and HEVC decoder specific */ {CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0, V4L2_MPEG_VIDEO_H264_LEVEL_5_0, 1, V4L2_MPEG_VIDEO_H264_LEVEL_4_1}, {CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1, V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1, V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1}, }; static struct msm_vidc_codec_capability bengal_capabilities_v1[] = { /* {cap_type, domains, codecs, min, max, step_size, default_value} */ {CAP_FRAME_WIDTH, DOMAINS_ALL, CODECS_ALL, 128, 1920, 1, 1920}, {CAP_FRAME_HEIGHT, DOMAINS_ALL, CODECS_ALL, 128, 1920, 1, 1080}, /* ((1920 * 1088) / 256) */ {CAP_MBS_PER_FRAME, DOMAINS_ALL, CODECS_ALL, 64, 8160, 1, 8160}, /* 1920*1088 @30fps */ {CAP_MBS_PER_SECOND, DOMAINS_ALL, CODECS_ALL, 64, 244800, 1, 244800}, {CAP_FRAMERATE, DOMAINS_ALL, CODECS_ALL, 1, 120, 1, 30}, {CAP_BITRATE, DOMAINS_ALL, CODECS_ALL, 1, 60000000, 1, 20000000}, {CAP_HIER_P_NUM_ENH_LAYERS, ENC, H264|HEVC, 0, 6, 1, 0}, Loading Loading @@ -858,7 +918,7 @@ static struct msm_vidc_common_data sm6150_common_data[] = { }, }; static struct msm_vidc_common_data bengal_common_data[] = { static struct msm_vidc_common_data bengal_common_data_v0[] = { { .key = "qcom,never-unload-fw", .value = 1, Loading @@ -873,11 +933,11 @@ static struct msm_vidc_common_data bengal_common_data[] = { }, { .key = "qcom,max-secure-instances", .value = 5, .value = 3, }, { .key = "qcom,max-hw-load", .value = 1216800, .value = 489600, }, { .key = "qcom,max-hq-mbs-per-frame", Loading @@ -888,12 +948,55 @@ static struct msm_vidc_common_data bengal_common_data[] = { .value = 244800, /* 1920 x 1088 @ 30 fps */ }, { .key = "qcom,max-b-frame-mbs-per-frame", .key = "qcom,power-collapse-delay", .value = 1500, }, { .key = "qcom,hw-resp-timeout", .value = 1000, }, { .key = "qcom,dcvs", .value = 1, }, { .key = "qcom,fw-cycles", .value = 733003, }, { .key = "qcom,fw-vpp-cycles", .value = 225975, }, }; static struct msm_vidc_common_data bengal_common_data_v1[] = { { .key = "qcom,never-unload-fw", .value = 1, }, { .key = "qcom,sw-power-collapse", .value = 1, }, { .key = "qcom,domain-attr-non-fatal-faults", .value = 1, }, { .key = "qcom,max-secure-instances", .value = 3, }, { .key = "qcom,max-hw-load", .value = 244800, }, { .key = "qcom,max-hq-mbs-per-frame", .value = 8160, }, { .key = "qcom,max-b-frame-mbs-per-sec", .value = 489600, .key = "qcom,max-hq-mbs-per-sec", .value = 244800, /* 1920 x 1088 @ 30 fps */ }, { .key = "qcom,power-collapse-delay", Loading Loading @@ -1249,8 +1352,8 @@ static struct msm_vidc_platform_data sm6150_data = { static struct msm_vidc_platform_data bengal_data = { .codec_data = bengal_codec_data, .codec_data_length = ARRAY_SIZE(bengal_codec_data), .common_data = bengal_common_data, .common_data_length = ARRAY_SIZE(bengal_common_data), .common_data = bengal_common_data_v0, .common_data_length = ARRAY_SIZE(bengal_common_data_v0), .csc_data.vpe_csc_custom_bias_coeff = vpe_csc_custom_bias_coeff, .csc_data.vpe_csc_custom_matrix_coeff = vpe_csc_custom_matrix_coeff, .csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff, Loading @@ -1261,8 +1364,8 @@ static struct msm_vidc_platform_data bengal_data = { .ubwc_config = 0x0, .codecs = bengal_codecs, .codecs_count = ARRAY_SIZE(bengal_codecs), .codec_caps = bengal_capabilities, .codec_caps_count = ARRAY_SIZE(bengal_capabilities), .codec_caps = bengal_capabilities_v0, .codec_caps_count = ARRAY_SIZE(bengal_capabilities_v0), }; static struct msm_vidc_platform_data sm8150_data = { Loading Loading @@ -1385,6 +1488,20 @@ static int msm_vidc_read_efuse( return 0; } static int msm_vidc_read_rank( struct msm_vidc_platform_data *data, struct device *dev) { uint32_t num_ranks; num_ranks = 0; //TO-DO Read Rank API to be added data->sku_version = SKU_VERSION_0; if (num_ranks == 1) data->sku_version = SKU_VERSION_1; return 0; } void *vidc_get_drv_data(struct device *dev) { struct msm_vidc_platform_data *driver_data = NULL; Loading Loading @@ -1440,6 +1557,20 @@ void *vidc_get_drv_data(struct device *dev) d_vpr_h("DDR Type 0x%x hbb 0x%x\n", ddr_type, driver_data->ubwc_config ? driver_data->ubwc_config->highest_bank_bit : -1); } else if (!strcmp(match->compatible, "qcom,bengal-vidc")) { rc = msm_vidc_read_rank(driver_data, dev); if (rc) { d_vpr_e("Failed to get ddr rank, use Dual Rank DDR\n"); goto exit; } if (driver_data->sku_version == SKU_VERSION_1) { driver_data->common_data = bengal_common_data_v1; driver_data->common_data_length = ARRAY_SIZE(bengal_common_data_v1); driver_data->codec_caps = bengal_capabilities_v1; driver_data->codec_caps_count = ARRAY_SIZE(bengal_capabilities_v1); } } exit: Loading