Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a37ec982 authored by Paolo Bonzini's avatar Paolo Bonzini Committed by Greg Kroah-Hartman
Browse files

KVM: x86: reinstate vendor-agnostic check on SPEC_CTRL cpuid bits 



[ Upstream commit 39485ed95d6b83b62fa75c06c2c4d33992e0d971 ]

Until commit e7c587da ("x86/speculation: Use synthetic bits for
IBRS/IBPB/STIBP"), KVM was testing both Intel and AMD CPUID bits before
allowing the guest to write MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD.
Testing only Intel bits on VMX processors, or only AMD bits on SVM
processors, fails if the guests are created with the "opposite" vendor
as the host.

While at it, also tweak the host CPU check to use the vendor-agnostic
feature bit X86_FEATURE_IBPB, since we only care about the availability
of the MSR on the host here and not about specific CPUID bits.

Fixes: e7c587da ("x86/speculation: Use synthetic bits for IBRS/IBPB/STIBP")
Cc: stable@vger.kernel.org
Reported-by: default avatarDenis V. Lunev <den@openvz.org>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 88464279

arch/x86/kvm/cpuid.h

+14 −0
Original line number Diff line number Diff line
@@ -154,6 +154,20 @@ static inline int guest_cpuid_stepping(struct kvm_vcpu *vcpu) 
	return x86_stepping(best->eax);

}



static inline bool guest_has_spec_ctrl_msr(struct kvm_vcpu *vcpu)

{

	return (guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) ||

		guest_cpuid_has(vcpu, X86_FEATURE_AMD_STIBP) ||

		guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS) ||

		guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD));

}



static inline bool guest_has_pred_cmd_msr(struct kvm_vcpu *vcpu)

{

	return (guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) ||

		guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBPB));

}



static inline bool supports_cpuid_fault(struct kvm_vcpu *vcpu)

{

	return vcpu->arch.msr_platform_info & MSR_PLATFORM_INFO_CPUID_FAULT;

arch/x86/kvm/svm.c

+3 −10
Original line number Diff line number Diff line
@@ -4209,10 +4209,7 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) 
		break;

	case MSR_IA32_SPEC_CTRL:

		if (!msr_info->host_initiated &&

		    !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) &&

		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_STIBP) &&

		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS) &&

		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD))

		    !guest_has_spec_ctrl_msr(vcpu))

			return 1;



		msr_info->data = svm->spec_ctrl;
@@ -4314,10 +4311,7 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr) 
		break;

	case MSR_IA32_SPEC_CTRL:

		if (!msr->host_initiated &&

		    !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) &&

		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_STIBP) &&

		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS) &&

		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD))

		    !guest_has_spec_ctrl_msr(vcpu))

			return 1;



		/* The STIBP bit doesn't fault even if it's not advertised */
@@ -4344,12 +4338,11 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr) 
		break;

	case MSR_IA32_PRED_CMD:

		if (!msr->host_initiated &&

		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBPB))

		    !guest_has_pred_cmd_msr(vcpu))

			return 1;



		if (data & ~PRED_CMD_IBPB)

			return 1;



		if (!data)

			break;

arch/x86/kvm/vmx.c

+3 −3
Original line number Diff line number Diff line
@@ -4066,7 +4066,7 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) 
		return kvm_get_msr_common(vcpu, msr_info);

	case MSR_IA32_SPEC_CTRL:

		if (!msr_info->host_initiated &&

		    !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL))

		    !guest_has_spec_ctrl_msr(vcpu))

			return 1;



		msr_info->data = to_vmx(vcpu)->spec_ctrl;
@@ -4180,7 +4180,7 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) 
		break;

	case MSR_IA32_SPEC_CTRL:

		if (!msr_info->host_initiated &&

		    !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL))

		    !guest_has_spec_ctrl_msr(vcpu))

			return 1;



		/* The STIBP bit doesn't fault even if it's not advertised */
@@ -4210,7 +4210,7 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) 
		break;

	case MSR_IA32_PRED_CMD:

		if (!msr_info->host_initiated &&

		    !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL))

		    !guest_has_pred_cmd_msr(vcpu))

			return 1;



		if (data & ~PRED_CMD_IBPB)