Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 3179a1a3 authored by Saravana Kannan's avatar Saravana Kannan
Browse files

ANDROID: GKI: clk: Add support for voltage voting



This change adds support for voltage voting in the clock framework. This
will NOT be carried over to newer kernels.

Bug: 150506629
Signed-off-by: default avatarDavid Collins <collinsd@codeaurora.org>
Signed-off-by: default avatarDavid Dai <daidavid1@codeaurora.org>
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
Signed-off-by: default avatarShefali Jain <shefjain@codeaurora.org>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
[saravanak: Squashed the following commits and dropped some debug code
	    and code whose functionality that's replaced by clk_sync_state()
	ff5ce501 clk: do not vote for vdd_class level with 0 Hz rate_max
	96f0596c clk: provider: cleanup of unused use_max_uV
	83d12e55 clk: Always vote INT_MAX as maximum voltage for a rail
	352850e6 clk: handle reentrant clk_set_rate() calls from clock supply regulators
	0d8060cd clk: add bus voting to rate_get, rate_set, enable_set debug functions
	d4c36a3d clk: remove prepare lock and bus voting in clk_debug_print_hw
	813f6662 clk: add bus voting ops for debug purposes
	7e056107 clk: qcom: Fix return value check for round rate during clock registration
	c4540b8e clk: fix conflicting bit for measure clock flag
	fa9b3044 clk: correct vdd_class voting scheme used during clock rate changes
	61dad289 clk: Move VDD voltage voting from core clock to top clock
	0cbef8b6 clk: qcom: Add support to log PLL/RCGR values in case of failure
	bcc43f7a clk: qcom: Add support for debugfs measure clock
	1ac9516f clk: Export the clock driver's voltage voting APIs
	c4316254 clk: add/modify debugfs support for clocks
	d30b895f clk: move check for CLK_ENABLE_HAND_OFF at unused tree
	11032174 clk: Add support to provide OPP tables for clocks
	f3494857 clk: Add support to vote to regulator framework from clk framework
	81286aed clk: Check for failure at clk_change_rate
	6a4951a8 clk: qcom: clk-voter: Add support for voter clocks
	b904878a clk: Add support to set custom flags with clk_set_flags ]
Signed-off-by: default avatarSaravana Kannan <saravanak@google.com>
Change-Id: I95574f11053e8f3762c8d660183ce5004ff5cc5b
parent 1d887ea9
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment