ARM: dts: msm: Change data size for PCIe write halt

Update value from 1MB to 256B for PCI RC 1 (3x2).
This is a software workaround to prevent system
bus deadlock issue with concurrent access of
greater than 256B granularity from two PCIe
ports to DDR.

Change-Id: I9461e97a70f58b7ca3070881f208615a0624f5b6