usb: dwc3: Set FORCE_MEM_CORE_ON bit of GCC_USB30_MASTER_CLK
USB FORCE_MEM_CORE_ON retains the USB controller CSR when system
goes into and comes out from CXPC (i.e. using MX instead of CX).
This change sets the FORCE_MEM_CORE_ON bit of GCC_USB30_MASTER_CLK
by calling qcom_clk_set_flags API exposed by clock driver.
Change-Id: Ifb83b1b02214b034be53d2b443ae101688b4a97e
Signed-off-by:
Pratham Pratap <prathampratap@codeaurora.org>
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