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Commit 5de46e81 authored by Yuanfang Zhang's avatar Yuanfang Zhang
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coresight: fix etr pice mode issue 



Only start the sw mode when pcie_path is configured as sw.

Change-Id: I3b9fb890008760b0a25827bb039cd378512f4efe
Signed-off-by: default avatarYuanfang Zhang <zhangyuanfang@codeaurora.org>
parent f6eb6018
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