clk: sunxi-ng: h6: fix PWM gate/reset offset
Currently the register offset of the PWM bus gate in Allwinner H6 clock
driver is wrong.
Fix this issue.
Fixes: 542353ea ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
Signed-off-by:
Rongyi Chen <chenyi@tt-cool.com>
[Icenowy: refactor commit message]
Signed-off-by:
Icenowy Zheng <icenowy@aosc.io>
Signed-off-by:
Chen-Yu Tsai <wens@csie.org>
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