Merge "msm: kgsl: Add GPU_RBBM_GBIF_CLIENT_QOS_CNTL to powerup register list" (3fbf87d4) · Commits · e / devices / android_kernel_fairphone_FP5

drivers/gpu/msm/adreno_a6xx.c

+19 −6

Original line number	Diff line number	Diff line
		@@ -63,7 +63,6 @@ static u32 a6xx_pwrup_reglist[] = {

		/* IFPC only static powerup restore list */
		static u32 a6xx_ifpc_pwrup_reglist[] = {
		A6XX_RBBM_VBIF_CLIENT_QOS_CNTL,
		A6XX_CP_CHICKEN_DBG,
		A6XX_CP_DBG_ECO_CNTL,
		A6XX_CP_PROTECT_CNTL,
		@@ -102,12 +101,14 @@ static u32 a6xx_ifpc_pwrup_reglist[] = {
		A6XX_CP_AHB_CNTL,
		};

		/*
		* a620, a650 and a660 need to program A6XX_CP_PROTECT_REG_47
		* for the infinite span
		*/
		/* Applicable to a620, a650 and a660 */
		static u32 a650_pwrup_reglist[] = {
		A6XX_CP_PROTECT_REG + 47,
		A6XX_CP_PROTECT_REG + 47, /* Programmed for infinite span */
		A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_0,
		A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_1,
		A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_2,
		A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_3,
		A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_4,
		};

		static u32 a615_pwrup_reglist[] = {
		@@ -335,6 +336,18 @@ static void a6xx_patch_pwrup_reglist(struct adreno_device *adreno_dev)
		lock->list_length += reglist[i].count * 2;
		}

		if (adreno_is_a630(adreno_dev)) {
		*dest++ = A6XX_RBBM_VBIF_CLIENT_QOS_CNTL;
		kgsl_regread(KGSL_DEVICE(adreno_dev),
		A6XX_RBBM_VBIF_CLIENT_QOS_CNTL, dest++);
		} else {
		*dest++ = A6XX_RBBM_GBIF_CLIENT_QOS_CNTL;
		kgsl_regread(KGSL_DEVICE(adreno_dev),
		A6XX_RBBM_GBIF_CLIENT_QOS_CNTL, dest++);
		}

		lock->list_length += 2;

		/*
		* The overall register list is composed of
		* 1. Static IFPC-only registers