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Commit 8c7cf67d authored by Rajesh Kemisetti's avatar Rajesh Kemisetti Committed by Raghu Ananya Arabolu
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msm: kgsl: Add GPU_RBBM_GBIF_CLIENT_QOS_CNTL to powerup register list 



GPU_RBBM_GBIF_CLIENT_QOS_CNTL register is getting updated for
every wake up sequence but not retained across IFPC.

Add this register to GPU specific powerup register list so as to
restore its value across IFPC.

Change-Id: I3fe15ad43af1f0f1adc49764e749bb89e4cf8a65
Signed-off-by: default avatarRajesh Kemisetti <rajeshk@codeaurora.org>
Signed-off-by: default avatarRaghu Ananya Arabolu <rarabolu@codeaurora.org>
parent 9bfbf558

drivers/gpu/msm/adreno_a6xx.c

+12 −1
Original line number Diff line number Diff line
@@ -63,7 +63,6 @@ static u32 a6xx_pwrup_reglist[] = { 


/* IFPC only static powerup restore list */

static u32 a6xx_ifpc_pwrup_reglist[] = {

	A6XX_RBBM_VBIF_CLIENT_QOS_CNTL,

	A6XX_CP_CHICKEN_DBG,

	A6XX_CP_DBG_ECO_CNTL,

	A6XX_CP_PROTECT_CNTL,
@@ -337,6 +336,18 @@ static void a6xx_patch_pwrup_reglist(struct adreno_device *adreno_dev) 
		lock->list_length += reglist[i].count * 2;

	}



	if (adreno_is_a630(adreno_dev)) {

		*dest++ = A6XX_RBBM_VBIF_CLIENT_QOS_CNTL;

		kgsl_regread(KGSL_DEVICE(adreno_dev),

			A6XX_RBBM_VBIF_CLIENT_QOS_CNTL, dest++);

	} else {

		*dest++ = A6XX_RBBM_GBIF_CLIENT_QOS_CNTL;

		kgsl_regread(KGSL_DEVICE(adreno_dev),

			A6XX_RBBM_GBIF_CLIENT_QOS_CNTL, dest++);

	}



	lock->list_length += 2;



	/*

	 * The overall register list is composed of

	 * 1. Static IFPC-only registers