Commits · 21e94459110252d41b45c0c8ba50fd72a664d50c · e / devices / android_kernel_fairphone_FP4 · GitLab

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Dec 23, 2017
- x86/mm: Optimize RESTORE_CR3 · 21e94459
  Peter Zijlstra authored Dec 04, 2017
  21e94459
- x86/mm: Use/Fix PCID to optimize user/kernel switches · 6fd166aa
  Peter Zijlstra authored Dec 04, 2017
  6fd166aa
- x86/mm: Abstract switching CR3 · 48e11198
  Dave Hansen authored Dec 04, 2017
  48e11198
- x86/mm: Allow flushing for future ASID switches · 2ea907c4
  Dave Hansen authored Dec 04, 2017
  2ea907c4
- x86/pti: Map the vsyscall page if needed · 85900ea5
  Andy Lutomirski authored Dec 12, 2017
  85900ea5
- x86/pti: Put the LDT in its own PGD if PTI is on · f55f0501
  Andy Lutomirski authored Dec 12, 2017
  f55f0501
- x86/mm/64: Make a full PGD-entry size hole in the memory map · 9f449772
  Andy Lutomirski authored Dec 12, 2017
  9f449772
- x86/events/intel/ds: Map debug buffers in cpu_entry_area · c1961a46
  Hugh Dickins authored Dec 04, 2017
  c1961a46
- x86/cpu_entry_area: Add debugstore entries to cpu_entry_area · 10043e02
  Thomas Gleixner authored Dec 04, 2017
  10043e02
- x86/mm/pti: Map ESPFIX into user space · 4b6bbe95
  Andy Lutomirski authored Dec 15, 2017
  4b6bbe95
- x86/mm/pti: Share entry text PMD · 6dc72c3c
  Thomas Gleixner authored Dec 04, 2017
  6dc72c3c
- x86/entry: Align entry text section to PMD boundary · 2f7412ba
  Thomas Gleixner authored Dec 04, 2017
  2f7412ba
- x86/mm/pti: Share cpu_entry_area with user space page tables · f7cfbee9
  Andy Lutomirski authored Dec 04, 2017
  f7cfbee9
- x86/mm/pti: Force entry through trampoline when PTI active · 8d4b0678
  Thomas Gleixner authored Dec 04, 2017
  8d4b0678
- x86/mm/pti: Add functions to clone kernel PMDs · 03f4424f
  Andy Lutomirski authored Dec 04, 2017
  03f4424f
- x86/mm/pti: Populate user PGD · fc2fbc85
  Dave Hansen authored Dec 04, 2017
  fc2fbc85
- x86/mm/pti: Allocate a separate user PGD · d9e9a641
  Dave Hansen authored Dec 04, 2017
  d9e9a641
- x86/mm/pti: Allow NX poison to be set in p4d/pgd · 1c4de1ff
  Dave Hansen authored Dec 04, 2017
  1c4de1ff
- x86/mm/pti: Add mapping helper functions · 61e9b367
  Dave Hansen authored Dec 04, 2017
  61e9b367
- x86/pti: Add the pti= cmdline option and documentation · 41f4c20b
  Borislav Petkov authored Dec 12, 2017
  41f4c20b
- x86/mm/pti: Add infrastructure for page table isolation · aa8c6248
  Thomas Gleixner authored Dec 04, 2017
  aa8c6248
- x86/mm/pti: Prepare the x86/entry assembly code for entry/exit CR3 switching · 8a09317b
  Dave Hansen authored Dec 04, 2017
  8a09317b
- x86/mm/pti: Disable global pages if PAGE_TABLE_ISOLATION=y · c313ec66
  Dave Hansen authored Dec 04, 2017
  c313ec66
- x86/cpufeatures: Add X86_BUG_CPU_INSECURE · a89f040f
  Thomas Gleixner authored Dec 04, 2017
  a89f040f
- x86/cpu_entry_area: Prevent wraparound in setup_cpu_entry_area_ptes() on 32bit · f6c4fd50
  Thomas Gleixner authored Dec 23, 2017
  f6c4fd50
Dec 22, 2017
- init: Invoke init_espfix_bsp() from mm_init() · 613e396b
  Thomas Gleixner authored Dec 17, 2017
  613e396b
- x86/cpu_entry_area: Move it out of the fixmap · 92a0f81d
  Thomas Gleixner authored Dec 20, 2017
  92a0f81d
- x86/cpu_entry_area: Move it to a separate unit · ed1bbc40
  Thomas Gleixner authored Dec 20, 2017
  ed1bbc40
- x86/mm: Create asm/invpcid.h · 1a3b0cae
  Peter Zijlstra authored Dec 05, 2017
  1a3b0cae
- x86/mm: Put MMU to hardware ASID translation in one place · dd95f1a4
  Dave Hansen authored Dec 04, 2017
  dd95f1a4
- x86/mm: Remove hard-coded ASID limit checks · cb0a9144
  Dave Hansen authored Dec 04, 2017
  cb0a9144
- x86/mm: Move the CR3 construction functions to tlbflush.h · 50fb83a6
  Dave Hansen authored Dec 04, 2017
  50fb83a6
- x86/mm: Add comments to clarify which TLB-flush functions are supposed to flush what · 3f67af51
  Peter Zijlstra authored Dec 05, 2017
  3f67af51
- x86/mm: Remove superfluous barriers · b5fc6d94
  Peter Zijlstra authored Dec 05, 2017
  b5fc6d94
- x86/mm: Use __flush_tlb_one() for kernel memory · a501686b
  Peter Zijlstra authored Dec 05, 2017
  a501686b
- x86/microcode: Dont abuse the TLB-flush interface · 23cb7d46
  Peter Zijlstra authored Dec 05, 2017
  23cb7d46
- x86/uv: Use the right TLB-flush API · 3e46e0f5
  Peter Zijlstra authored Dec 05, 2017
  3e46e0f5
- x86/entry: Rename SYSENTER_stack to CPU_ENTRY_AREA_entry_stack · 4fe2d8b1
  Dave Hansen authored Dec 04, 2017
  4fe2d8b1
- x86/doc: Remove obvious weirdnesses from the x86 MM layout documentation · e8ffe96e
  Peter Zijlstra authored Dec 05, 2017
  e8ffe96e
- x86/mm/64: Improve the memory map documentation · 5a7ccf47
  Andy Lutomirski authored Dec 12, 2017
  5a7ccf47