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Commit 3f67af51 authored by Peter Zijlstra's avatar Peter Zijlstra Committed by Ingo Molnar
Browse files

x86/mm: Add comments to clarify which TLB-flush functions are supposed to flush what 



Per popular request..

Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: David Laight <David.Laight@aculab.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Eduardo Valentin <eduval@amazon.com>
Cc: Greg KH <gregkh@linuxfoundation.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: aliguori@amazon.com
Cc: daniel.gruss@iaik.tugraz.at
Cc: hughd@google.com
Cc: keescook@google.com
Cc: linux-mm@kvack.org
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent b5fc6d94

arch/x86/include/asm/tlbflush.h

+21 −2
Original line number Diff line number Diff line
@@ -228,6 +228,9 @@ static inline void cr4_set_bits_and_update_boot(unsigned long mask) 


extern void initialize_tlbstate_and_flush(void);



/*

 * flush the entire current user mapping

 */

static inline void __native_flush_tlb(void)

{

	/*
@@ -240,6 +243,9 @@ static inline void __native_flush_tlb(void) 
	preempt_enable();

}



/*

 * flush everything

 */

static inline void __native_flush_tlb_global(void)

{

	unsigned long cr4, flags;
@@ -269,17 +275,27 @@ static inline void __native_flush_tlb_global(void) 
	raw_local_irq_restore(flags);

}



/*

 * flush one page in the user mapping

 */

static inline void __native_flush_tlb_single(unsigned long addr)

{

	asm volatile("invlpg (%0)" ::"r" (addr) : "memory");

}



/*

 * flush everything

 */

static inline void __flush_tlb_all(void)

{

	if (boot_cpu_has(X86_FEATURE_PGE))

	if (boot_cpu_has(X86_FEATURE_PGE)) {

		__flush_tlb_global();

	else

	} else {

		/*

		 * !PGE -> !PCID (setup_pcid()), thus every flush is total.

		 */

		__flush_tlb();

	}



	/*

	 * Note: if we somehow had PCID but not PGE, then this wouldn't work --
@@ -290,6 +306,9 @@ static inline void __flush_tlb_all(void) 
	 */

}



/*

 * flush one page in the kernel mapping

 */

static inline void __flush_tlb_one(unsigned long addr)

{

	count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ONE);