Loading qcom/msm-arm-smmu-lagoon.dtsi +22 −1 Original line number Diff line number Diff line Loading @@ -6,7 +6,6 @@ compatible = "qcom,smmu-v2"; reg = <0x3d40000 0x10000>; #iommu-cells = <1>; qcom,dynamic; qcom,use-3-lvl-tables; #global-interrupts = <2>; interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>, Loading @@ -19,6 +18,19 @@ <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; attach-impl-defs = <0x6000 0x2378>, <0x6060 0x1055>, <0x678c 0x8>, <0x6794 0x28>, <0x6800 0x6>, <0x6900 0x3ff>, <0x6924 0x204>, <0x6928 0x11000>, <0x6930 0x800>, <0x6960 0xffffffff>, <0x6b64 0x1a5551>, <0x6b68 0x9a82a382>; }; apps_smmu: apps-smmu@15000000 { Loading Loading @@ -115,6 +127,15 @@ <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>; qcom,actlr = /* For HF-0 TBU +3 deep PF */ <0x800 0x3ff 0x103>, /* For SF-0 TBU +3 deep PF */ <0xC00 0x3ff 0x103>, /* For NPU +3 deep PF */ <0x1440 0x2f 0x103>, <0x1480 0xf 0x103>; anoc_1_tbu: anoc_1_tbu@15185000 { compatible = "qcom,qsmmuv500-tbu"; reg = <0x15185000 0x1000>, Loading Loading
qcom/msm-arm-smmu-lagoon.dtsi +22 −1 Original line number Diff line number Diff line Loading @@ -6,7 +6,6 @@ compatible = "qcom,smmu-v2"; reg = <0x3d40000 0x10000>; #iommu-cells = <1>; qcom,dynamic; qcom,use-3-lvl-tables; #global-interrupts = <2>; interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>, Loading @@ -19,6 +18,19 @@ <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; attach-impl-defs = <0x6000 0x2378>, <0x6060 0x1055>, <0x678c 0x8>, <0x6794 0x28>, <0x6800 0x6>, <0x6900 0x3ff>, <0x6924 0x204>, <0x6928 0x11000>, <0x6930 0x800>, <0x6960 0xffffffff>, <0x6b64 0x1a5551>, <0x6b68 0x9a82a382>; }; apps_smmu: apps-smmu@15000000 { Loading Loading @@ -115,6 +127,15 @@ <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>; qcom,actlr = /* For HF-0 TBU +3 deep PF */ <0x800 0x3ff 0x103>, /* For SF-0 TBU +3 deep PF */ <0xC00 0x3ff 0x103>, /* For NPU +3 deep PF */ <0x1440 0x2f 0x103>, <0x1480 0xf 0x103>; anoc_1_tbu: anoc_1_tbu@15185000 { compatible = "qcom,qsmmuv500-tbu"; reg = <0x15185000 0x1000>, Loading