Merge "ARM: dts: msm: Add MPROC device nodes for lagoon" (395c96cf) · Commits · e / devices / android_kernel_fairphone_FP4

qcom/lagoon.dtsi

+364 −0

Original line number	Diff line number	Diff line
		@@ -8,6 +8,7 @@
		#include <dt-bindings/clock/qcom,videocc-lagoon.h>
		#include <dt-bindings/interrupt-controller/arm-gic.h>
		#include <dt-bindings/soc/qcom,rpmh-rsc.h>
		#include <dt-bindings/soc/qcom,ipcc.h>

		/ {
		model = "Qualcomm Technologies, Inc. Lagoon";
		@@ -1130,6 +1131,369 @@
		#clock-cells = <1>;
		#reset-cells = <1>;
		};

		tcsr_mutex_block: syscon@1f40000 {
		compatible = "syscon";
		reg = <0x1f40000 0x20000>;
		};

		tcsr_mutex: hwlock {
		compatible = "qcom,tcsr-mutex";
		syscon = <&tcsr_mutex_block 0 0x1000>;
		#hwlock-cells = <1>;
		};

		smem: qcom,smem {
		compatible = "qcom,smem";
		memory-region = <&smem_region>;
		hwlocks = <&tcsr_mutex 3>;
		};

		qcom,glink {
		compatible = "qcom,glink";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		glink_modem: modem {
		qcom,remote-pid = <1>;
		transport = "smem";
		mboxes = <&ipcc_mproc IPCC_CLIENT_MPSS
		IPCC_MPROC_SIGNAL_GLINK_QMP>;
		mbox-names = "modem_smem";
		interrupt-parent = <&ipcc_mproc>;
		interrupts = <IPCC_CLIENT_MPSS
		IPCC_MPROC_SIGNAL_GLINK_QMP
		IRQ_TYPE_EDGE_RISING>;
		label = "modem";
		qcom,glink-label = "mpss";

		qcom,modem_qrtr {
		qcom,glink-channels = "IPCRTR";
		qcom,low-latency;
		qcom,intents = <0x800 5
		0x2000 3
		0x4400 2>;
		};

		qcom,modem_glink_ssr {
		qcom,glink-channels = "glink_ssr";
		qcom,notify-edges = <&glink_adsp>,
		<&glink_cdsp>;
		};

		qcom,msm_fastrpc_rpmsg {
		compatible = "qcom,msm-fastrpc-rpmsg";
		qcom,glink-channels = "fastrpcglink-apps-dsp";
		qcom,intents = <0x64 64>;
		};

		qcom,modem_ds {
		qcom,glink-channels = "DS";
		qcom,intents = <0x4000 0x2>;
		};
		};

		glink_adsp: adsp {
		qcom,remote-pid = <2>;
		transport = "smem";
		mboxes = <&ipcc_mproc IPCC_CLIENT_LPASS
		IPCC_MPROC_SIGNAL_GLINK_QMP>;
		mbox-names = "adsp_smem";
		interrupt-parent = <&ipcc_mproc>;
		interrupts = <IPCC_CLIENT_LPASS
		IPCC_MPROC_SIGNAL_GLINK_QMP
		IRQ_TYPE_EDGE_RISING>;
		label = "adsp";
		qcom,glink-label = "lpass";

		qcom,adsp_qrtr {
		qcom,glink-channels = "IPCRTR";
		qcom,low-latency;
		qcom,intents = <0x800 5
		0x2000 3
		0x4400 2>;
		};

		qcom,apr_tal_rpmsg {
		qcom,glink-channels = "apr_audio_svc";
		qcom,intents = <0x200 20>;
		};

		qcom,msm_fastrpc_rpmsg {
		compatible = "qcom,msm-fastrpc-rpmsg";
		qcom,glink-channels = "fastrpcglink-apps-dsp";
		qcom,intents = <0x64 64>;
		};

		qcom,adsp_glink_ssr {
		qcom,glink-channels = "glink_ssr";
		qcom,notify-edges = <&glink_modem>,
		<&glink_cdsp>;
		};
		};

		glink_cdsp: cdsp {
		qcom,remote-pid = <5>;
		transport = "smem";
		mboxes = <&ipcc_mproc IPCC_CLIENT_CDSP
		IPCC_MPROC_SIGNAL_GLINK_QMP>;
		mbox-names = "dsps_smem";
		interrupt-parent = <&ipcc_mproc>;
		interrupts = <IPCC_CLIENT_CDSP
		IPCC_MPROC_SIGNAL_GLINK_QMP
		IRQ_TYPE_EDGE_RISING>;
		label = "cdsp";
		qcom,glink-label = "cdsp";

		qcom,cdsp_qrtr {
		qcom,glink-channels = "IPCRTR";
		qcom,intents = <0x800 5
		0x2000 3
		0x4400 2>;
		};

		qcom,msm_fastrpc_rpmsg {
		compatible = "qcom,msm-fastrpc-rpmsg";
		qcom,glink-channels = "fastrpcglink-apps-dsp";
		qcom,intents = <0x64 64>;
		};

		qcom,cdsp_glink_ssr {
		qcom,glink-channels = "glink_ssr";
		qcom,notify-edges = <&glink_modem>,
		<&glink_adsp>,
		<&glink_npu>;
		};
		};

		glink_npu: npu {
		qcom,remote-pid = <10>;
		transport = "smem";
		mboxes = <&ipcc_mproc IPCC_CLIENT_NPU
		IPCC_MPROC_SIGNAL_GLINK_QMP>;
		mbox-names = "npu_smem";
		interrupt-parent = <&ipcc_mproc>;
		interrupts = <IPCC_CLIENT_NPU
		IPCC_MPROC_SIGNAL_GLINK_QMP
		IRQ_TYPE_EDGE_RISING>;
		label = "npu";
		qcom,glink-label = "npu";

		qcom,npu_qrtr {
		qcom,glink-channels = "IPCRTR";
		qcom,intents = <0x800 5
		0x2000 3
		0x4400 2>;
		};

		qcom,npu_glink_ssr {
		qcom,glink-channels = "glink_ssr";
		qcom,notify-edges = <&glink_modem>,
		<&glink_adsp>,
		<&glink_cdsp>;
		};
		};
		};

		qcom,glinkpkt {
		compatible = "qcom,glinkpkt";

		qcom,glinkpkt-at-mdm0 {
		qcom,glinkpkt-edge = "mpss";
		qcom,glinkpkt-ch-name = "DS";
		qcom,glinkpkt-dev-name = "at_mdm0";
		};

		qcom,glinkpkt-apr-apps2 {
		qcom,glinkpkt-edge = "adsp";
		qcom,glinkpkt-ch-name = "apr_apps2";
		qcom,glinkpkt-dev-name = "apr_apps2";
		};

		qcom,glinkpkt-data40-cntl {
		qcom,glinkpkt-edge = "mpss";
		qcom,glinkpkt-ch-name = "DATA40_CNTL";
		qcom,glinkpkt-dev-name = "smdcntl8";
		};

		qcom,glinkpkt-data1 {
		qcom,glinkpkt-edge = "mpss";
		qcom,glinkpkt-ch-name = "DATA1";
		qcom,glinkpkt-dev-name = "smd7";
		};

		qcom,glinkpkt-data4 {
		qcom,glinkpkt-edge = "mpss";
		qcom,glinkpkt-ch-name = "DATA4";
		qcom,glinkpkt-dev-name = "smd8";
		};

		qcom,glinkpkt-data11 {
		qcom,glinkpkt-edge = "mpss";
		qcom,glinkpkt-ch-name = "DATA11";
		qcom,glinkpkt-dev-name = "smd11";
		};
		};

		qcom,smp2p-mpss {
		compatible = "qcom,smp2p";
		qcom,smem = <435>, <428>;
		interrupt-parent = <&ipcc_mproc>;
		interrupts = <IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_SMP2P
		IRQ_TYPE_EDGE_RISING>;
		mboxes = <&ipcc_mproc IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_SMP2P>;
		qcom,local-pid = <0>;
		qcom,remote-pid = <1>;

		mpss_smp2p_out: master-kernel {
		qcom,entry-name = "master-kernel";
		#qcom,smem-state-cells = <1>;
		};

		mpss_smp2p_in: slave-kernel {
		qcom,entry-name = "slave-kernel";
		interrupt-controller;
		#interrupt-cells = <2>;
		};

		smp2p_ipa_1_out: qcom,smp2p-ipa-1-out {
		qcom,entry-name = "ipa";
		#qcom,smem-state-cells = <1>;
		};

		/* ipa - inbound entry from mss */
		smp2p_ipa_1_in: qcom,smp2p-ipa-1-in {
		qcom,entry-name = "ipa";
		interrupt-controller;
		#interrupt-cells = <2>;
		};

		smp2p_wlan_1_in: qcom,smp2p-wlan-1-in {
		qcom,entry-name = "wlan";
		interrupt-controller;
		#interrupt-cells = <2>;
		};
		};

		qcom,smp2p-adsp {
		compatible = "qcom,smp2p";
		qcom,smem = <443>, <429>;
		interrupt-parent = <&ipcc_mproc>;
		interrupts = <IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_SMP2P
		IRQ_TYPE_EDGE_RISING>;
		mboxes = <&ipcc_mproc IPCC_CLIENT_LPASS
		IPCC_MPROC_SIGNAL_SMP2P>;
		qcom,local-pid = <0>;
		qcom,remote-pid = <2>;

		adsp_smp2p_out: master-kernel {
		qcom,entry-name = "master-kernel";
		#qcom,smem-state-cells = <1>;
		};

		adsp_smp2p_in: slave-kernel {
		qcom,entry-name = "slave-kernel";
		interrupt-controller;
		#interrupt-cells = <2>;
		};

		sleepstate_smp2p_out: sleepstate-out {
		qcom,entry-name = "sleepstate";
		#qcom,smem-state-cells = <1>;
		};

		sleepstate_smp2p_in: qcom,sleepstate-in {
		qcom,entry-name = "sleepstate_see";
		interrupt-controller;
		#interrupt-cells = <2>;
		};

		smp2p_rdbg2_out: qcom,smp2p-rdbg2-out {
		qcom,entry-name = "rdbg";
		#qcom,smem-state-cells = <1>;
		};

		smp2p_rdbg2_in: qcom,smp2p-rdbg2-in {
		qcom,entry-name = "rdbg";
		interrupt-controller;
		#interrupt-cells = <2>;
		};
		};

		qcom,smp2p-cdsp {
		compatible = "qcom,smp2p";
		qcom,smem = <94>, <432>;
		interrupt-parent = <&ipcc_mproc>;
		interrupts = <IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_SMP2P
		IRQ_TYPE_EDGE_RISING>;
		mboxes = <&ipcc_mproc IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_SMP2P>;
		qcom,local-pid = <0>;
		qcom,remote-pid = <5>;

		cdsp_smp2p_out: master-kernel {
		qcom,entry-name = "master-kernel";
		#qcom,smem-state-cells = <1>;
		};

		cdsp_smp2p_in: slave-kernel {
		qcom,entry-name = "slave-kernel";
		interrupt-controller;
		#interrupt-cells = <2>;
		};

		smp2p_rdbg5_out: qcom,smp2p-rdbg5-out {
		qcom,entry-name = "rdbg";
		#qcom,smem-state-cells = <1>;
		};

		smp2p_rdbg5_in: qcom,smp2p-rdbg5-in {
		qcom,entry-name = "rdbg";
		interrupt-controller;
		#interrupt-cells = <2>;
		};
		};

		qcom,smp2p-npu {
		compatible = "qcom,smp2p";
		qcom,smem = <617>, <616>;
		interrupt-parent = <&ipcc_mproc>;
		interrupts = <IPCC_CLIENT_NPU IPCC_MPROC_SIGNAL_SMP2P
		IRQ_TYPE_EDGE_RISING>;
		mboxes = <&ipcc_mproc IPCC_CLIENT_NPU IPCC_MPROC_SIGNAL_SMP2P>;
		qcom,local-pid = <0>;
		qcom,remote-pid = <10>;

		npu_smp2p_out: master-kernel {
		qcom,entry-name = "master-kernel";
		#qcom,smem-state-cells = <1>;
		};

		npu_smp2p_in: slave-kernel {
		qcom,entry-name = "slave-kernel";
		interrupt-controller;
		#interrupt-cells = <2>;
		};
		};

		qmp_aop: qcom,qmp-aop@c300000 {
		compatible = "qcom,qmp-mbox";
		reg = <0xc300000 0x1000>;
		reg-names = "msgram";
		mboxes = <&ipcc_mproc IPCC_CLIENT_AOP
		IPCC_MPROC_SIGNAL_GLINK_QMP>;
		mbox-names = "aop_qmp";
		interrupt-parent = <&ipcc_mproc>;
		interrupts = <IPCC_CLIENT_AOP
		IPCC_MPROC_SIGNAL_GLINK_QMP
		IRQ_TYPE_EDGE_RISING>;

		label = "aop";
		qcom,early-boot;
		priority = <0>;
		mbox-desc-offset = <0x0>;
		#mbox-cells = <1>;
		};
		};

		#include "lagoon-gdsc.dtsi"