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Commit 633a6554 authored by Vijayanand Jitta's avatar Vijayanand Jitta Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: add impl-def and actlr settings for lagoon 

Add implementation defined register settings for gfx smmu
and actlr settings for HF,SF tbus and NPU clients on apps
smmu for lagoon.

Change-Id: I9760fc85ea4b9855a1c3db3722bdd20324742a10
parent 3dbc269e

qcom/msm-arm-smmu-lagoon.dtsi

+22 −0
Original line number Diff line number Diff line
@@ -18,6 +18,19 @@ 
				<GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;

		attach-impl-defs =

				<0x6000 0x2378>,

				<0x6060 0x1055>,

				<0x678c 0x8>,

				<0x6794 0x28>,

				<0x6800 0x6>,

				<0x6900 0x3ff>,

				<0x6924 0x204>,

				<0x6928 0x11000>,

				<0x6930 0x800>,

				<0x6960 0xffffffff>,

				<0x6b64 0x1a5551>,

				<0x6b68 0x9a82a382>;

	};



	apps_smmu: apps-smmu@15000000 {
@@ -114,6 +127,15 @@ 
				<GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>;



		qcom,actlr =

			/* For HF-0 TBU +3 deep PF */

			<0x800 0x3ff 0x103>,

			/* For SF-0 TBU +3 deep PF */

			<0xC00 0x3ff 0x103>,

			/* For NPU +3 deep PF */

			<0x1440 0x2f 0x103>,

			<0x1480 0xf 0x103>;



		anoc_1_tbu: anoc_1_tbu@15185000 {

			compatible = "qcom,qsmmuv500-tbu";

			reg = <0x15185000 0x1000>,