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Commit 9e8ea5e7 authored by Harshdeep Dhatt's avatar Harshdeep Dhatt
Browse files

msm: kgsl: Use CACHE_FLUSH_TS for global timestamp 



There have been cases where the global timestamp is ahead
of the context timestamp. To remove this anomaly, use the
EVENT_WRITE packet instead of MEM_WRITE.

Change-Id: Ib8243949796a0243cbf5e343b4b1443cc7b7c1d3
Signed-off-by: default avatarHarshdeep Dhatt <hdhatt@codeaurora.org>
parent a19d4744

drivers/gpu/msm/adreno_ringbuffer.c

+7 −5
Original line number Diff line number Diff line
@@ -527,8 +527,8 @@ adreno_ringbuffer_addcmds(struct adreno_ringbuffer *rb, 
	total_sizedwords += 5; /* eop timestamp */



	if (drawctxt && !is_internal_cmds(flags)) {

		/* global timestamp without cache flush for non-zero context */

		total_sizedwords += 4;

		/* global timestamp with cache flush ts for non-zero context */

		total_sizedwords += 5;

	}



	if (flags & KGSL_CMD_FLAGS_WFI)
@@ -679,9 +679,11 @@ adreno_ringbuffer_addcmds(struct adreno_ringbuffer *rb, 
		*ringcmds++ = timestamp;



		/* Write the end of pipeline timestamp to the ringbuffer too */

		ringcmds += cp_mem_write(adreno_dev, ringcmds,

			MEMSTORE_RB_GPU_ADDR(device, rb, eoptimestamp),

			rb->timestamp);

		*ringcmds++ = cp_mem_packet(adreno_dev, CP_EVENT_WRITE, 3, 1);

		*ringcmds++ = CACHE_FLUSH_TS;

		ringcmds += cp_gpuaddr(adreno_dev, ringcmds,

			MEMSTORE_RB_GPU_ADDR(device, rb, eoptimestamp));

		*ringcmds++ = rb->timestamp;

	} else {

		ringcmds += cp_gpuaddr(adreno_dev, ringcmds,

			MEMSTORE_RB_GPU_ADDR(device, rb, eoptimestamp));