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Commit a19d4744 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add dual panel support on kona"

parents ce52dc3b 4d6e9cd4
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+6 −3
Original line number Diff line number Diff line
@@ -65,9 +65,12 @@ Optional properties:
- qcom,panel-te-source:  Specifies the source pin for Vsync from panel or WD Timer.
- qcom,dsi-ctrl: handle to dsi controller device
- qcom,dsi-phy: handle to dsi phy device
- qcom,dsi-ctrl-num:		Specifies the DSI controllers to use
- qcom,dsi-phy-num:		Specifies the DSI PHYs to use
- qcom,dsi-select-clocks:	Specifies the required clocks to use
- qcom,dsi-ctrl-num:		Specifies the DSI controllers to use for primary panel
- qcom,dsi-sec-ctrl-num:	Specifies the DSI controllers to use for secondary panel
- qcom,dsi-phy-num:		Specifies the DSI PHYs to use for primary panel
- qcom,dsi-sec-phy-num:		Specifies the DSI PHYs to use for secondary panel
- qcom,dsi-select-clocks:	Specifies the required clocks to use for primary panel
- qcom,dsi-select-sec-clocks:	Specifies the required clocks to use for secondary  panel
- qcom,dsi-display-list:	Specifies the list of supported displays.
- qcom,dsi-manager:       Specifies dsi manager is present
- qcom,dsi-display:       Specifies dsi display is present
+4 −0
Original line number Diff line number Diff line
@@ -13,6 +13,10 @@
		qcom,dsi-phy-num = <0>;
		qcom,dsi-select-clocks = "src_byte_clk0", "src_pixel_clk0";

		qcom,dsi-sec-ctrl-num = <1>;
		qcom,dsi-sec-phy-num = <1>;
		qcom,dsi-select-sec-clocks = "src_byte_clk1", "src_pixel_clk1";

		qcom,mdss-dsi-virtual-channel-id = <0>;
		qcom,mdss-dsi-stream = <0>;
		qcom,mdss-dsi-bpp = <24>;
+3 −3
Original line number Diff line number Diff line
@@ -9,9 +9,9 @@
				"sim hd command mode secondary dsi panel";
		qcom,mdss-dsi-panel-type = "dsi_cmd_mode";

		qcom,dsi-ctrl-num = <1>;
		qcom,dsi-phy-num = <1>;
		qcom,dsi-select-clocks = "src_byte_clk1", "src_pixel_clk1";
		qcom,dsi-sec-ctrl-num = <1>;
		qcom,dsi-sec-phy-num = <1>;
		qcom,dsi-select-sec-clocks = "src_byte_clk1", "src_pixel_clk1";

		qcom,mdss-dsi-virtual-channel-id = <0>;
		qcom,mdss-dsi-stream = <0>;
+14 −0
Original line number Diff line number Diff line
@@ -251,11 +251,14 @@

&dsi_nt35695b_truly_fhd_cmd {
	qcom,panel-supply-entries = <&dsi_panel_pwr_supply_avdd>;
	qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply_avdd>;
	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
	qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_external";
	qcom,mdss-dsi-bl-min-level = <1>;
	qcom,mdss-dsi-bl-max-level = <4095>;
	qcom,platform-te-gpio = <&tlmm 66 0>;
	qcom,platform-reset-gpio = <&tlmm 75 0>;
	qcom,platform-sec-reset-gpio = <&tlmm 128 0>;
};

&dsi_nt35695b_truly_fhd_video {
@@ -302,6 +305,17 @@
	qcom,platform-reset-gpio = <&tlmm 75 0>;
};

&dsi_sim_sec_hd_cmd {
	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
	qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
	qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
	qcom,mdss-dsi-bl-min-level = <1>;
	qcom,mdss-dsi-bl-max-level = <1023>;
	qcom,platform-reset-gpio = <&tlmm 75 0>;
	qcom,platform-sec-reset-gpio = <&tlmm 128 0>;
};

&sde_dsi {
	qcom,dsi-default-panel = <&dsi_sw43404_amoled_cmd>;
};
+11 −0
Original line number Diff line number Diff line
@@ -471,6 +471,17 @@
	qcom,platform-reset-gpio = <&tlmm 75 0>;
};

&dsi_sim_sec_hd_cmd {
	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
	qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
	qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
	qcom,mdss-dsi-bl-min-level = <1>;
	qcom,mdss-dsi-bl-max-level = <1023>;
	qcom,platform-reset-gpio = <&tlmm 75 0>;
	qcom,platform-sec-reset-gpio = <&tlmm 128 0>;
};

&sde_dsi {
	qcom,dsi-default-panel = <&dsi_sw43404_amoled_cmd>;
};
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