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Commit 4d6e9cd4 authored by Satya Rama Aditya Pinapala's avatar Satya Rama Aditya Pinapala
Browse files

ARM: dts: msm: Add dual panel support on kona 



This change adds support for dual panel on kona target.

Change-Id: Ic4d69fe8fabffb56aab1c42b78e8de1078956065
Signed-off-by: default avatarSatya Rama Aditya Pinapala <psraditya30@codeaurora.org>
parent 1ecf20a4

arch/arm64/boot/dts/qcom/dsi-panel-nt35695b-truly-fhd-cmd.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -13,6 +13,10 @@ 
		qcom,dsi-phy-num = <0>;

		qcom,dsi-select-clocks = "src_byte_clk0", "src_pixel_clk0";



		qcom,dsi-sec-ctrl-num = <1>;

		qcom,dsi-sec-phy-num = <1>;

		qcom,dsi-select-sec-clocks = "src_byte_clk1", "src_pixel_clk1";



		qcom,mdss-dsi-virtual-channel-id = <0>;

		qcom,mdss-dsi-stream = <0>;

		qcom,mdss-dsi-bpp = <24>;

arch/arm64/boot/dts/qcom/dsi-panel-sim-sec-hd-cmd.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -9,9 +9,9 @@ 
				"sim hd command mode secondary dsi panel";

		qcom,mdss-dsi-panel-type = "dsi_cmd_mode";



		qcom,dsi-ctrl-num = <1>;

		qcom,dsi-phy-num = <1>;

		qcom,dsi-select-clocks = "src_byte_clk1", "src_pixel_clk1";

		qcom,dsi-sec-ctrl-num = <1>;

		qcom,dsi-sec-phy-num = <1>;

		qcom,dsi-select-sec-clocks = "src_byte_clk1", "src_pixel_clk1";



		qcom,mdss-dsi-virtual-channel-id = <0>;

		qcom,mdss-dsi-stream = <0>;

arch/arm64/boot/dts/qcom/kona-cdp.dtsi

+14 −0
Original line number Diff line number Diff line
@@ -251,11 +251,14 @@ 


&dsi_nt35695b_truly_fhd_cmd {

	qcom,panel-supply-entries = <&dsi_panel_pwr_supply_avdd>;

	qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply_avdd>;

	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";

	qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_external";

	qcom,mdss-dsi-bl-min-level = <1>;

	qcom,mdss-dsi-bl-max-level = <4095>;

	qcom,platform-te-gpio = <&tlmm 66 0>;

	qcom,platform-reset-gpio = <&tlmm 75 0>;

	qcom,platform-sec-reset-gpio = <&tlmm 128 0>;

};



&dsi_nt35695b_truly_fhd_video {
@@ -302,6 +305,17 @@ 
	qcom,platform-reset-gpio = <&tlmm 75 0>;

};



&dsi_sim_sec_hd_cmd {

	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;

	qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;

	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";

	qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";

	qcom,mdss-dsi-bl-min-level = <1>;

	qcom,mdss-dsi-bl-max-level = <1023>;

	qcom,platform-reset-gpio = <&tlmm 75 0>;

	qcom,platform-sec-reset-gpio = <&tlmm 128 0>;

};



&sde_dsi {

	qcom,dsi-default-panel = <&dsi_sw43404_amoled_cmd>;

};

arch/arm64/boot/dts/qcom/kona-mtp.dtsi

+11 −0
Original line number Diff line number Diff line
@@ -471,6 +471,17 @@ 
	qcom,platform-reset-gpio = <&tlmm 75 0>;

};



&dsi_sim_sec_hd_cmd {

	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;

	qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;

	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";

	qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";

	qcom,mdss-dsi-bl-min-level = <1>;

	qcom,mdss-dsi-bl-max-level = <1023>;

	qcom,platform-reset-gpio = <&tlmm 75 0>;

	qcom,platform-sec-reset-gpio = <&tlmm 128 0>;

};



&sde_dsi {

	qcom,dsi-default-panel = <&dsi_sw43404_amoled_cmd>;

};

arch/arm64/boot/dts/qcom/kona-pinctrl.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -738,12 +738,12 @@ 


			sde_dsi1_active: sde_dsi1_active {

				mux {

					pins = "gpio128", "gpio60";

					pins = "gpio128";

					function = "gpio";

				};



				config {

					pins = "gpio128", "gpio60";

					pins = "gpio128";

					drive-strength = <8>;   /* 8 mA */

					bias-disable = <0>;   /* no pull */

				};
@@ -751,12 +751,12 @@ 


			sde_dsi1_suspend: sde_dsi1_suspend {

				mux {

					pins = "gpio128", "gpio60";

					pins = "gpio128";

					function = "gpio";

				};



				config {

					pins = "gpio128", "gpio60";

					pins = "gpio128";

					drive-strength = <2>;   /* 2 mA */

					bias-pull-down;         /* PULL DOWN */

				};