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Commit 7cef0c7b authored by Hareesh Gundu's avatar Hareesh Gundu
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msm: kgsl Update GPU to DDR bus-width for A702 



For A702 GPU to DDR bus width is 128bit, Hence update
bus-width configuration to reflect correct status.

Change-Id: Ic5b918434c63f71c412f782564e7a7aa818da6f5
Signed-off-by: default avatarHareesh Gundu <hareeshg@codeaurora.org>
parent 51d808aa
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