Merge "clk: qcom: Update the display port determine rate RCG ops" into msm-4.9 (ba8292c2) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/clk/qcom/clk-rcg2.c

+3 −10

Original line number	Diff line number	Diff line
		@@ -1066,15 +1066,8 @@ static int clk_dp_set_rate_and_parent(struct clk_hw *hw, unsigned long rate,
		static int clk_dp_determine_rate(struct clk_hw *hw,
		struct clk_rate_request *req)
		{
		if (!hw)
		return -EINVAL;

		if (!clk_hw_get_parent(hw)) {
		pr_err("Missing the parent for the DP RCG\n");
		return -EINVAL;
		}

		req->best_parent_rate = clk_get_rate(clk_hw_get_parent(hw)->clk);
		req->best_parent_rate = clk_hw_round_rate(req->best_parent_hw,
		req->best_parent_rate);
		return 0;
		}