Loading arch/arm64/include/asm/cpucaps.h +2 −1 Original line number Diff line number Diff line Loading @@ -36,7 +36,8 @@ #define ARM64_MISMATCHED_CACHE_LINE_SIZE 15 #define ARM64_UNMAP_KERNEL_AT_EL0 16 #define ARM64_WORKAROUND_QCOM_FALKOR_E1003 17 #define ARM64_NCAPS 17 #define ARM64_NCAPS 18 #endif /* __ASM_CPUCAPS_H */ arch/arm64/include/asm/fixmap.h +1 −0 Original line number Diff line number Diff line Loading @@ -53,6 +53,7 @@ enum fixed_addresses { FIX_TEXT_POKE0, #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 FIX_ENTRY_TRAMP_DATA, FIX_ENTRY_TRAMP_TEXT, #define TRAMP_VALIAS (__fix_to_virt(FIX_ENTRY_TRAMP_TEXT)) #endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */ Loading arch/arm64/kernel/entry.S +14 −0 Original line number Diff line number Diff line Loading @@ -948,7 +948,13 @@ __ni_sys_trace: msr tpidrro_el0, x30 // Restored in kernel_ventry .endif tramp_map_kernel x30 #ifdef CONFIG_RANDOMIZE_BASE adr x30, tramp_vectors + PAGE_SIZE alternative_insn isb, nop, ARM64_WORKAROUND_QCOM_FALKOR_E1003 ldr x30, [x30] #else ldr x30, =vectors #endif prfm plil1strm, [x30, #(1b - tramp_vectors)] msr vbar_el1, x30 add x30, x30, #(1b - tramp_vectors) Loading Loading @@ -991,6 +997,14 @@ END(tramp_exit_compat) .ltorg .popsection // .entry.tramp.text #ifdef CONFIG_RANDOMIZE_BASE .pushsection ".rodata", "a" .align PAGE_SHIFT .globl __entry_tramp_data_start __entry_tramp_data_start: .quad vectors .popsection // .rodata #endif /* CONFIG_RANDOMIZE_BASE */ #endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */ /* Loading arch/arm64/kernel/vmlinux.lds.S +4 −1 Original line number Diff line number Diff line Loading @@ -257,7 +257,10 @@ ASSERT(__idmap_text_end - (__idmap_text_start & ~(SZ_4K - 1)) <= SZ_4K, ASSERT(__hibernate_exit_text_end - (__hibernate_exit_text_start & ~(SZ_4K - 1)) <= SZ_4K, "Hibernate exit text too big or misaligned") #endif #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 ASSERT((__entry_tramp_text_end - __entry_tramp_text_start) == PAGE_SIZE, "Entry trampoline text too big") #endif /* * If padding is applied before .head.text, virt<->phys conversions will fail. */ Loading arch/arm64/mm/mmu.c +9 −1 Original line number Diff line number Diff line Loading @@ -474,8 +474,16 @@ static int __init map_entry_trampoline(void) __create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS, PAGE_SIZE, prot, pgd_pgtable_alloc, 0); /* ...as well as the kernel page table */ /* Map both the text and data into the kernel page table */ __set_fixmap(FIX_ENTRY_TRAMP_TEXT, pa_start, prot); if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) { extern char __entry_tramp_data_start[]; __set_fixmap(FIX_ENTRY_TRAMP_DATA, __pa_symbol(__entry_tramp_data_start), PAGE_KERNEL_RO); } return 0; } core_initcall(map_entry_trampoline); Loading Loading
arch/arm64/include/asm/cpucaps.h +2 −1 Original line number Diff line number Diff line Loading @@ -36,7 +36,8 @@ #define ARM64_MISMATCHED_CACHE_LINE_SIZE 15 #define ARM64_UNMAP_KERNEL_AT_EL0 16 #define ARM64_WORKAROUND_QCOM_FALKOR_E1003 17 #define ARM64_NCAPS 17 #define ARM64_NCAPS 18 #endif /* __ASM_CPUCAPS_H */
arch/arm64/include/asm/fixmap.h +1 −0 Original line number Diff line number Diff line Loading @@ -53,6 +53,7 @@ enum fixed_addresses { FIX_TEXT_POKE0, #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 FIX_ENTRY_TRAMP_DATA, FIX_ENTRY_TRAMP_TEXT, #define TRAMP_VALIAS (__fix_to_virt(FIX_ENTRY_TRAMP_TEXT)) #endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */ Loading
arch/arm64/kernel/entry.S +14 −0 Original line number Diff line number Diff line Loading @@ -948,7 +948,13 @@ __ni_sys_trace: msr tpidrro_el0, x30 // Restored in kernel_ventry .endif tramp_map_kernel x30 #ifdef CONFIG_RANDOMIZE_BASE adr x30, tramp_vectors + PAGE_SIZE alternative_insn isb, nop, ARM64_WORKAROUND_QCOM_FALKOR_E1003 ldr x30, [x30] #else ldr x30, =vectors #endif prfm plil1strm, [x30, #(1b - tramp_vectors)] msr vbar_el1, x30 add x30, x30, #(1b - tramp_vectors) Loading Loading @@ -991,6 +997,14 @@ END(tramp_exit_compat) .ltorg .popsection // .entry.tramp.text #ifdef CONFIG_RANDOMIZE_BASE .pushsection ".rodata", "a" .align PAGE_SHIFT .globl __entry_tramp_data_start __entry_tramp_data_start: .quad vectors .popsection // .rodata #endif /* CONFIG_RANDOMIZE_BASE */ #endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */ /* Loading
arch/arm64/kernel/vmlinux.lds.S +4 −1 Original line number Diff line number Diff line Loading @@ -257,7 +257,10 @@ ASSERT(__idmap_text_end - (__idmap_text_start & ~(SZ_4K - 1)) <= SZ_4K, ASSERT(__hibernate_exit_text_end - (__hibernate_exit_text_start & ~(SZ_4K - 1)) <= SZ_4K, "Hibernate exit text too big or misaligned") #endif #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 ASSERT((__entry_tramp_text_end - __entry_tramp_text_start) == PAGE_SIZE, "Entry trampoline text too big") #endif /* * If padding is applied before .head.text, virt<->phys conversions will fail. */ Loading
arch/arm64/mm/mmu.c +9 −1 Original line number Diff line number Diff line Loading @@ -474,8 +474,16 @@ static int __init map_entry_trampoline(void) __create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS, PAGE_SIZE, prot, pgd_pgtable_alloc, 0); /* ...as well as the kernel page table */ /* Map both the text and data into the kernel page table */ __set_fixmap(FIX_ENTRY_TRAMP_TEXT, pa_start, prot); if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) { extern char __entry_tramp_data_start[]; __set_fixmap(FIX_ENTRY_TRAMP_DATA, __pa_symbol(__entry_tramp_data_start), PAGE_KERNEL_RO); } return 0; } core_initcall(map_entry_trampoline); Loading