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Commit 912612c5 authored by Will Deacon's avatar Will Deacon Committed by Channagoud Kadabi
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UPSTREAM: arm64: kaslr: Put kernel vectors address in separate data page



The literal pool entry for identifying the vectors base is the only piece
of information in the trampoline page that identifies the true location
of the kernel.

This patch moves it into a page-aligned region of the .rodata section
and maps this adjacent to the trampoline text via an additional fixmap
entry, which protects against any accidental leakage of the trampoline
contents.

Suggested-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: default avatarLaura Abbott <labbott@redhat.com>
Tested-by: default avatarShanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
(cherry picked from commit 6c27c4082f4f70b9f41df4d0adf51128b40351df)

Change-Id: Id125331e7fa5645c801a26843fecca53f8773705
Signed-off-by: default avatarTodd Poynor <toddpoynor@google.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@google.com>
Git-commit: 06fe41f8
Git-repo: https://android.googlesource.com/kernel/common/


[ckadabi@codeaurora.org: Define ARM64_WORKAROUND_QCOM_FALKOR_E1003 to
avoid compilation errors]
Signed-off-by: default avatarChannagoud Kadabi <ckadabi@codeaurora.org>
parent 4345a534
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+2 −1
Original line number Diff line number Diff line
@@ -36,7 +36,8 @@
#define ARM64_MISMATCHED_CACHE_LINE_SIZE	15

#define ARM64_UNMAP_KERNEL_AT_EL0		16
#define	ARM64_WORKAROUND_QCOM_FALKOR_E1003	17

#define ARM64_NCAPS				17
#define ARM64_NCAPS				18

#endif /* __ASM_CPUCAPS_H */
+1 −0
Original line number Diff line number Diff line
@@ -53,6 +53,7 @@ enum fixed_addresses {
	FIX_TEXT_POKE0,

#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
	FIX_ENTRY_TRAMP_DATA,
	FIX_ENTRY_TRAMP_TEXT,
#define TRAMP_VALIAS		(__fix_to_virt(FIX_ENTRY_TRAMP_TEXT))
#endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */
+14 −0
Original line number Diff line number Diff line
@@ -948,7 +948,13 @@ __ni_sys_trace:
	msr	tpidrro_el0, x30	// Restored in kernel_ventry
	.endif
	tramp_map_kernel	x30
#ifdef CONFIG_RANDOMIZE_BASE
	adr	x30, tramp_vectors + PAGE_SIZE
alternative_insn isb, nop, ARM64_WORKAROUND_QCOM_FALKOR_E1003
	ldr	x30, [x30]
#else
	ldr	x30, =vectors
#endif
	prfm	plil1strm, [x30, #(1b - tramp_vectors)]
	msr	vbar_el1, x30
	add	x30, x30, #(1b - tramp_vectors)
@@ -991,6 +997,14 @@ END(tramp_exit_compat)

	.ltorg
	.popsection				// .entry.tramp.text
#ifdef CONFIG_RANDOMIZE_BASE
	.pushsection ".rodata", "a"
	.align PAGE_SHIFT
	.globl	__entry_tramp_data_start
__entry_tramp_data_start:
	.quad	vectors
	.popsection				// .rodata
#endif /* CONFIG_RANDOMIZE_BASE */
#endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */

/*
+4 −1
Original line number Diff line number Diff line
@@ -257,7 +257,10 @@ ASSERT(__idmap_text_end - (__idmap_text_start & ~(SZ_4K - 1)) <= SZ_4K,
ASSERT(__hibernate_exit_text_end - (__hibernate_exit_text_start & ~(SZ_4K - 1))
	<= SZ_4K, "Hibernate exit text too big or misaligned")
#endif

#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
ASSERT((__entry_tramp_text_end - __entry_tramp_text_start) == PAGE_SIZE,
	"Entry trampoline text too big")
#endif
/*
 * If padding is applied before .head.text, virt<->phys conversions will fail.
 */
+9 −1
Original line number Diff line number Diff line
@@ -474,8 +474,16 @@ static int __init map_entry_trampoline(void)
	__create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS, PAGE_SIZE,
			     prot, pgd_pgtable_alloc, 0);

	/* ...as well as the kernel page table */
	/* Map both the text and data into the kernel page table */
	__set_fixmap(FIX_ENTRY_TRAMP_TEXT, pa_start, prot);
	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) {
		extern char __entry_tramp_data_start[];

		__set_fixmap(FIX_ENTRY_TRAMP_DATA,
			     __pa_symbol(__entry_tramp_data_start),
			     PAGE_KERNEL_RO);
	}

	return 0;
}
core_initcall(map_entry_trampoline);