Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4345a534 authored by Will Deacon's avatar Will Deacon Committed by Channagoud Kadabi
Browse files

UPSTREAM: arm64: mm: Introduce TTBR_ASID_MASK for getting at the ASID in the TTBR 



There are now a handful of open-coded masks to extract the ASID from a
TTBR value, so introduce a TTBR_ASID_MASK and use that instead.

Suggested-by: default avatarMark Rutland <mark.rutland@arm.com>
Reviewed-by: default avatarMark Rutland <mark.rutland@arm.com>
Tested-by: default avatarLaura Abbott <labbott@redhat.com>
Tested-by: default avatarShanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
(cherry picked from commit b519538dfefc2f8478a1bcb458459c861d431784)

[toddpoynor@google.com: fixup context, asm-uaccess.h changes to
uaccess.h]
Change-Id: Ia456c58c83f9bbd02177cefb8e3106dfffe357cc
Signed-off-by: default avatarTodd Poynor <toddpoynor@google.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@google.com>
Git-commit: d7013ede
Git-repo: https://android.googlesource.com/kernel/common/


Signed-off-by: default avatarChannagoud Kadabi <ckadabi@codeaurora.org>
parent 3e85c600

arch/arm64/include/asm/mmu.h

+1 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ 




#define USER_ASID_FLAG	(UL(1) << 48)

#define TTBR_ASID_MASK	(UL(0xffff) << 48)



#ifndef __ASSEMBLY__

arch/arm64/include/asm/uaccess.h

+4 −3
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ 


#include <asm/alternative.h>

#include <asm/kernel-pgtable.h>

#include <asm/mmu.h>

#include <asm/sysreg.h>



#ifndef __ASSEMBLY__
@@ -138,7 +139,7 @@ static inline void __uaccess_ttbr0_disable(void) 
	write_sysreg(ttbr + SWAPPER_DIR_SIZE, ttbr0_el1);

	isb();

	/* Set reserved ASID */

	ttbr &= ~(0xffffUL << 48);

	ttbr &= ~TTBR_ASID_MASK;

	write_sysreg(ttbr, ttbr1_el1);

	isb();

}
@@ -157,7 +158,7 @@ static inline void __uaccess_ttbr0_enable(void) 


	/* Restore active ASID */

	ttbr1 = read_sysreg(ttbr1_el1);

	ttbr1 |= ttbr0 & (0xffffUL << 48);

	ttbr1 |= ttbr0 & TTBR_ASID_MASK;

	write_sysreg(ttbr1, ttbr1_el1);

	isb();
@@ -453,7 +454,7 @@ extern __must_check long strnlen_user(const char __user *str, long n); 
	msr	ttbr0_el1, \tmp1		// set reserved TTBR0_EL1

	isb

	sub     \tmp1, \tmp1, #SWAPPER_DIR_SIZE

	bic     \tmp1, \tmp1, #(0xffff << 48)

	bic     \tmp1, \tmp1, #TTBR_ASID_MASK

	msr     ttbr1_el1, \tmp1                // set reserved ASID

	isb

	.endm

arch/arm64/kernel/entry.S

+1 −1
Original line number Diff line number Diff line
@@ -151,7 +151,7 @@ alternative_else_nop_endif 


	.if	\el != 0

	mrs	x21, ttbr1_el1

	tst	x21, #0xffff << 48		// Check for the reserved ASID

	tst	x21, #TTBR_ASID_MASK		// Check for the reserved ASID

	orr	x23, x23, #PSR_PAN_BIT		// Set the emulated PAN in the saved SPSR

	b.eq	1f				// TTBR0 access already disabled

	and	x23, x23, #~PSR_PAN_BIT		// Clear the emulated PAN in the saved SPSR