ARM: dts: msm: Add clk rates for ufs phy axi clock in sdhc1 in sdm670

Ufs_phy_axi clock needs to be scaled when the sdcc1_apps clock is
scaled. So add the rates at which ufs_phy clock should run corresponding
to the rate of the sdcc1_apps clock.

Change-Id: I78fa1989dc4da92e32af5786a8a0530c2e92c60e
Signed-off-by: Vijay Viswanath <vviswana@codeaurora.org>