Loading cc/config/riscv64_device.go +6 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,9 @@ var ( "-Werror=implicit-function-declaration", "-fno-emulated-tls", "-march=rv64gcv_zba_zbb_zbs", // Equivalent to "-munaligned-access", but our clang doesn't have that yet. "-Xclang -target-feature -Xclang +unaligned-scalar-mem", "-Xclang -target-feature -Xclang +unaligned-vector-mem", } riscv64ArchVariantCflags = map[string][]string{} Loading @@ -34,6 +37,9 @@ var ( riscv64Ldflags = []string{ "-Wl,--hash-style=gnu", "-march=rv64gcv_zba_zbb_zbs", // Equivalent to "-munaligned-access", but our clang doesn't have that yet. "-Xclang -target-feature -Xclang +unaligned-scalar-mem", "-Xclang -target-feature -Xclang +unaligned-vector-mem", } riscv64Lldflags = append(riscv64Ldflags, Loading Loading
cc/config/riscv64_device.go +6 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,9 @@ var ( "-Werror=implicit-function-declaration", "-fno-emulated-tls", "-march=rv64gcv_zba_zbb_zbs", // Equivalent to "-munaligned-access", but our clang doesn't have that yet. "-Xclang -target-feature -Xclang +unaligned-scalar-mem", "-Xclang -target-feature -Xclang +unaligned-vector-mem", } riscv64ArchVariantCflags = map[string][]string{} Loading @@ -34,6 +37,9 @@ var ( riscv64Ldflags = []string{ "-Wl,--hash-style=gnu", "-march=rv64gcv_zba_zbb_zbs", // Equivalent to "-munaligned-access", but our clang doesn't have that yet. "-Xclang -target-feature -Xclang +unaligned-scalar-mem", "-Xclang -target-feature -Xclang +unaligned-vector-mem", } riscv64Lldflags = append(riscv64Ldflags, Loading